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gem5 / public / gem5 / 43ea4e01a0443fde405794a5b914c59caa13688a / . / tests / long / se / 60.bzip2 / ref / arm / linux / minor-timing / stats.txt
blob: 24c0fbbea173705495296eb55cf4ecb00f000e39 [file] [log] [blame]
---------- Begin Simulation Statistics ----------
sim_seconds 1.150356 # Number of seconds simulated
sim_ticks 1150356296500 # Number of ticks simulated
final_tick 1150356296500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 374766 # Simulator instruction rate (inst/s)
host_op_rate 403753 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 279117141 # Simulator tick rate (ticks/s)
host_mem_usage 273688 # Number of bytes of host memory used
host_seconds 4121.41 # Real time elapsed on the host
sim_insts 1544563088 # Number of instructions simulated
sim_ops 1664032481 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.physmem.bytes_read::cpu.inst 50240 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 132097728 # Number of bytes read from this memory
system.physmem.bytes_read::total 132147968 # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst 50240 # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total 50240 # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks 67851072 # Number of bytes written to this memory
system.physmem.bytes_written::total 67851072 # Number of bytes written to this memory
system.physmem.num_reads::cpu.inst 785 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 2064027 # Number of read requests responded to by this memory
system.physmem.num_reads::total 2064812 # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks 1060173 # Number of write requests responded to by this memory
system.physmem.num_writes::total 1060173 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.inst 43673 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data 114832012 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total 114875685 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst 43673 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total 43673 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks 58982658 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total 58982658 # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks 58982658 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst 43673 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 114832012 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 173858343 # Total bandwidth to/from this memory (bytes/s)
system.physmem.readReqs 2064812 # Number of read requests accepted
system.physmem.writeReqs 1060173 # Number of write requests accepted
system.physmem.readBursts 2064812 # Number of DRAM read bursts, including those serviced by the write queue
system.physmem.writeBursts 1060173 # Number of DRAM write bursts, including those merged in the write queue
system.physmem.bytesReadDRAM 132064448 # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ 83520 # Total number of bytes read from write queue
system.physmem.bytesWritten 67849344 # Total number of bytes written to DRAM
system.physmem.bytesReadSys 132147968 # Total read bytes from the system interface side
system.physmem.bytesWrittenSys 67851072 # Total written bytes from the system interface side
system.physmem.servicedByWrQ 1305 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
system.physmem.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
system.physmem.perBankRdBursts::0 128530 # Per bank write bursts
system.physmem.perBankRdBursts::1 125798 # Per bank write bursts
system.physmem.perBankRdBursts::2 122667 # Per bank write bursts
system.physmem.perBankRdBursts::3 124564 # Per bank write bursts
system.physmem.perBankRdBursts::4 123583 # Per bank write bursts
system.physmem.perBankRdBursts::5 123689 # Per bank write bursts
system.physmem.perBankRdBursts::6 124368 # Per bank write bursts
system.physmem.perBankRdBursts::7 124965 # Per bank write bursts
system.physmem.perBankRdBursts::8 132503 # Per bank write bursts
system.physmem.perBankRdBursts::9 134776 # Per bank write bursts
system.physmem.perBankRdBursts::10 133237 # Per bank write bursts
system.physmem.perBankRdBursts::11 134508 # Per bank write bursts
system.physmem.perBankRdBursts::12 134521 # Per bank write bursts
system.physmem.perBankRdBursts::13 134606 # Per bank write bursts
system.physmem.perBankRdBursts::14 130538 # Per bank write bursts
system.physmem.perBankRdBursts::15 130654 # Per bank write bursts
system.physmem.perBankWrBursts::0 66782 # Per bank write bursts
system.physmem.perBankWrBursts::1 64941 # Per bank write bursts
system.physmem.perBankWrBursts::2 63176 # Per bank write bursts
system.physmem.perBankWrBursts::3 63581 # Per bank write bursts
system.physmem.perBankWrBursts::4 63564 # Per bank write bursts
system.physmem.perBankWrBursts::5 63647 # Per bank write bursts
system.physmem.perBankWrBursts::6 65050 # Per bank write bursts
system.physmem.perBankWrBursts::7 66062 # Per bank write bursts
system.physmem.perBankWrBursts::8 67977 # Per bank write bursts
system.physmem.perBankWrBursts::9 68434 # Per bank write bursts
system.physmem.perBankWrBursts::10 68153 # Per bank write bursts
system.physmem.perBankWrBursts::11 68587 # Per bank write bursts
system.physmem.perBankWrBursts::12 68034 # Per bank write bursts
system.physmem.perBankWrBursts::13 68534 # Per bank write bursts
system.physmem.perBankWrBursts::14 67158 # Per bank write bursts
system.physmem.perBankWrBursts::15 66466 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
system.physmem.totGap 1150356195500 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
system.physmem.readPktSize::3 0 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
system.physmem.readPktSize::6 2064812 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 0 # Write request sizes (log2)
system.physmem.writePktSize::3 0 # Write request sizes (log2)
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
system.physmem.writePktSize::6 1060173 # Write request sizes (log2)
system.physmem.rdQLenPdf::0 1919552 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1 143941 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::2 14 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see
system.physmem.wrQLenPdf::0 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::1 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::2 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::3 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::4 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::5 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::6 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::7 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::8 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::9 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::10 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::11 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::12 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::15 30915 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::16 32043 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::17 57354 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18 62496 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::19 62733 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::20 62829 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::21 62687 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::22 62667 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::23 62593 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24 62549 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::25 62604 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::26 62637 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::27 62661 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::28 62650 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::29 62796 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::30 63099 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31 62454 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::32 62359 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::33 30 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::34 2 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::35 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::36 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::37 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::38 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::39 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::40 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::41 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::43 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::44 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::45 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::46 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::47 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::48 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::49 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::50 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::51 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::52 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::53 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::54 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::55 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::56 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::57 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::58 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::59 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::60 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see
system.physmem.bytesPerActivate::samples 1927714 # Bytes accessed per row activation
system.physmem.bytesPerActivate::mean 103.704114 # Bytes accessed per row activation
system.physmem.bytesPerActivate::gmean 81.833686 # Bytes accessed per row activation
system.physmem.bytesPerActivate::stdev 125.867792 # Bytes accessed per row activation
system.physmem.bytesPerActivate::0-127 1497696 77.69% 77.69% # Bytes accessed per row activation
system.physmem.bytesPerActivate::128-255 310699 16.12% 93.81% # Bytes accessed per row activation
system.physmem.bytesPerActivate::256-383 52184 2.71% 96.52% # Bytes accessed per row activation
system.physmem.bytesPerActivate::384-511 20631 1.07% 97.59% # Bytes accessed per row activation
system.physmem.bytesPerActivate::512-639 13074 0.68% 98.27% # Bytes accessed per row activation
system.physmem.bytesPerActivate::640-767 7807 0.40% 98.67% # Bytes accessed per row activation
system.physmem.bytesPerActivate::768-895 5185 0.27% 98.94% # Bytes accessed per row activation
system.physmem.bytesPerActivate::896-1023 5186 0.27% 99.21% # Bytes accessed per row activation
system.physmem.bytesPerActivate::1024-1151 15252 0.79% 100.00% # Bytes accessed per row activation
system.physmem.bytesPerActivate::total 1927714 # Bytes accessed per row activation
system.physmem.rdPerTurnAround::samples 62200 # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::mean 33.128826 # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::gmean 23.842942 # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::stdev 148.982645 # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::0-1023 62161 99.94% 99.94% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::1024-2047 18 0.03% 99.97% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::2048-3071 7 0.01% 99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::3072-4095 4 0.01% 99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::4096-5119 5 0.01% 99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::9216-10239 1 0.00% 99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::10240-11263 1 0.00% 100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::13312-14335 1 0.00% 100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::15360-16383 1 0.00% 100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::18432-19455 1 0.00% 100.00% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::total 62200 # Reads before turning the bus around for writes
system.physmem.wrPerTurnAround::samples 62200 # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::mean 17.044148 # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::gmean 17.013066 # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::stdev 1.029999 # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::16 29988 48.21% 48.21% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::17 1141 1.83% 50.05% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::18 29436 47.32% 97.37% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::19 1609 2.59% 99.96% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::20 24 0.04% 100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::21 2 0.00% 100.00% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::total 62200 # Writes before turning the bus around for reads
system.physmem.totQLat 60011294750 # Total ticks spent queuing
system.physmem.totMemAccLat 98702051000 # Total ticks spent from burst creation until serviced by the DRAM
system.physmem.totBusLat 10317535000 # Total ticks spent in databus transfers
system.physmem.avgQLat 29082.19 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
system.physmem.avgMemAccLat 47832.19 # Average memory access latency per DRAM burst
system.physmem.avgRdBW 114.80 # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW 58.98 # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys 114.88 # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys 58.98 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 1.36 # Data bus utilization in percentage
system.physmem.busUtilRead 0.90 # Data bus utilization in percentage for reads
system.physmem.busUtilWrite 0.46 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.02 # Average read queue length when enqueuing
system.physmem.avgWrQLen 24.14 # Average write queue length when enqueuing
system.physmem.readRowHits 775182 # Number of row buffer hits during reads
system.physmem.writeRowHits 420747 # Number of row buffer hits during writes
system.physmem.readRowHitRate 37.57 # Row buffer hit rate for reads
system.physmem.writeRowHitRate 39.69 # Row buffer hit rate for writes
system.physmem.avgGap 368115.75 # Average gap between requests
system.physmem.pageHitRate 38.29 # Row buffer hit rate, read and write combined
system.physmem_0.actEnergy 6705024060 # Energy for activate commands per rank (pJ)
system.physmem_0.preEnergy 3563778240 # Energy for precharge commands per rank (pJ)
system.physmem_0.readEnergy 7126890960 # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy 2697711660 # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy 71598184320.000015 # Energy for refresh commands per rank (pJ)
system.physmem_0.actBackEnergy 47589199680 # Energy for active background per rank (pJ)
system.physmem_0.preBackEnergy 2602904160 # Energy for precharge background per rank (pJ)
system.physmem_0.actPowerDownEnergy 242927855970 # Energy for active power-down per rank (pJ)
system.physmem_0.prePowerDownEnergy 71960703840 # Energy for precharge power-down per rank (pJ)
system.physmem_0.selfRefreshEnergy 82354339920 # Energy for self refresh per rank (pJ)
system.physmem_0.totalEnergy 539151608970 # Total energy per rank (pJ)
system.physmem_0.averagePower 468.682274 # Core power per rank (mW)
system.physmem_0.totalIdleTime 1039160467250 # Total Idle time Per DRAM Rank
system.physmem_0.memoryStateTime::IDLE 3513710000 # Time in different power states
system.physmem_0.memoryStateTime::REF 30352766000 # Time in different power states
system.physmem_0.memoryStateTime::SREF 319025802500 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 187397997250 # Time in different power states
system.physmem_0.memoryStateTime::ACT 77329050000 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 532736970750 # Time in different power states
system.physmem_1.actEnergy 7058925300 # Energy for activate commands per rank (pJ)
system.physmem_1.preEnergy 3751896390 # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy 7606549020 # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy 2836250460 # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy 71153184960.000015 # Energy for refresh commands per rank (pJ)
system.physmem_1.actBackEnergy 47703954360 # Energy for active background per rank (pJ)
system.physmem_1.preBackEnergy 2452947360 # Energy for precharge background per rank (pJ)
system.physmem_1.actPowerDownEnergy 248582355720 # Energy for active power-down per rank (pJ)
system.physmem_1.prePowerDownEnergy 68636874240 # Energy for precharge power-down per rank (pJ)
system.physmem_1.selfRefreshEnergy 80784488595 # Energy for self refresh per rank (pJ)
system.physmem_1.totalEnergy 540590019675 # Total energy per rank (pJ)
system.physmem_1.averagePower 469.932679 # Core power per rank (mW)
system.physmem_1.totalIdleTime 1039304472000 # Total Idle time Per DRAM Rank
system.physmem_1.memoryStateTime::IDLE 3115835000 # Time in different power states
system.physmem_1.memoryStateTime::REF 30156708000 # Time in different power states
system.physmem_1.memoryStateTime::SREF 315425606000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 178743425250 # Time in different power states
system.physmem_1.memoryStateTime::ACT 77779220750 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 545135501500 # Time in different power states
system.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.branchPred.lookups 240030332 # Number of BP lookups
system.cpu.branchPred.condPredicted 186613747 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 14536765 # Number of conditional branches incorrect
system.cpu.branchPred.BTBLookups 132238924 # Number of BTB lookups
system.cpu.branchPred.BTBHits 122337864 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
system.cpu.branchPred.BTBHitPct 92.512749 # BTB Hit Percentage
system.cpu.branchPred.usedRAS 15662658 # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect 15 # Number of incorrect RAS predictions.
system.cpu.branchPred.indirectLookups 538 # Number of indirect predictor lookups.
system.cpu.branchPred.indirectHits 232 # Number of indirect target hits.
system.cpu.branchPred.indirectMisses 306 # Number of indirect misses.
system.cpu.branchPredindirectMispredicted 162 # Number of mispredicted indirect branches.
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst
system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits
system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses
system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits
system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 # DTB read misses
system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 # DTB write hits
system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 # DTB write misses
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB
system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses
system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses
system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses
system.cpu.dstage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu.dstage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses
system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.dtb.walker.walks 0 # Table walker walks requested
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst
system.cpu.dtb.inst_hits 0 # ITB inst hits
system.cpu.dtb.inst_misses 0 # ITB inst misses
system.cpu.dtb.read_hits 0 # DTB read hits
system.cpu.dtb.read_misses 0 # DTB read misses
system.cpu.dtb.write_hits 0 # DTB write hits
system.cpu.dtb.write_misses 0 # DTB write misses
system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed
system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
system.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
system.cpu.dtb.flush_entries 0 # Number of entries that have been flushed from TLB
system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu.dtb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu.dtb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu.dtb.read_accesses 0 # DTB read accesses
system.cpu.dtb.write_accesses 0 # DTB write accesses
system.cpu.dtb.inst_accesses 0 # ITB inst accesses
system.cpu.dtb.hits 0 # DTB hits
system.cpu.dtb.misses 0 # DTB misses
system.cpu.dtb.accesses 0 # DTB accesses
system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst
system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits
system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses
system.cpu.istage2_mmu.stage2_tlb.read_hits 0 # DTB read hits
system.cpu.istage2_mmu.stage2_tlb.read_misses 0 # DTB read misses
system.cpu.istage2_mmu.stage2_tlb.write_hits 0 # DTB write hits
system.cpu.istage2_mmu.stage2_tlb.write_misses 0 # DTB write misses
system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB
system.cpu.istage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses
system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses
system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses
system.cpu.istage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu.istage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses
system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.itb.walker.walks 0 # Table walker walks requested
system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
system.cpu.itb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst
system.cpu.itb.inst_hits 0 # ITB inst hits
system.cpu.itb.inst_misses 0 # ITB inst misses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.itb.flush_tlb 0 # Number of times complete TLB was flushed
system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
system.cpu.itb.flush_entries 0 # Number of entries that have been flushed from TLB
system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu.itb.read_accesses 0 # DTB read accesses
system.cpu.itb.write_accesses 0 # DTB write accesses
system.cpu.itb.inst_accesses 0 # ITB inst accesses
system.cpu.itb.hits 0 # DTB hits
system.cpu.itb.misses 0 # DTB misses
system.cpu.itb.accesses 0 # DTB accesses
system.cpu.workload.numSyscalls 46 # Number of system calls
system.cpu.pwrStateResidencyTicks::ON 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.numCycles 2300712593 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 1544563088 # Number of instructions committed
system.cpu.committedOps 1664032481 # Number of ops (including micro ops) committed
system.cpu.discardedOps 41389188 # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching
system.cpu.cpi 1.489556 # CPI: cycles per instruction
system.cpu.ipc 0.671341 # IPC: instructions per cycle
system.cpu.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction
system.cpu.op_class_0::IntAlu 1030178776 61.91% 61.91% # Class of committed instruction
system.cpu.op_class_0::IntMult 700322 0.04% 61.95% # Class of committed instruction
system.cpu.op_class_0::IntDiv 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatAdd 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatCmp 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatCvt 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatMult 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatMultAcc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatDiv 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatMisc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::FloatSqrt 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdAdd 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdAddAcc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdAlu 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdCmp 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdCvt 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdMisc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdMult 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdMultAcc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdShift 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdShiftAcc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdSqrt 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatAdd 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatAlu 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatCmp 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatCvt 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatDiv 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMisc 3 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMult 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 61.95% # Class of committed instruction
system.cpu.op_class_0::MemRead 458306322 27.54% 89.49% # Class of committed instruction
system.cpu.op_class_0::MemWrite 174847022 10.51% 100.00% # Class of committed instruction
system.cpu.op_class_0::FloatMemRead 12 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::FloatMemWrite 24 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::total 1664032481 # Class of committed instruction
system.cpu.tickCycles 1845105384 # Number of cycles that the object actually ticked
system.cpu.idleCycles 455607209 # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.dcache.tags.replacements 9220185 # number of replacements
system.cpu.dcache.tags.tagsinuse 4085.806447 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 624504262 # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs 9224281 # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs 67.702216 # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle 9872962500 # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data 4085.806447 # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data 0.997511 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total 0.997511 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0 201 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1 1190 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2 2640 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::3 65 # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses 1277413521 # Number of tag accesses
system.cpu.dcache.tags.data_accesses 1277413521 # Number of data accesses
system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.dcache.ReadReq_hits::cpu.data 454174952 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 454174952 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 170329187 # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total 170329187 # number of WriteReq hits
system.cpu.dcache.SoftPFReq_hits::cpu.data 1 # number of SoftPFReq hits
system.cpu.dcache.SoftPFReq_hits::total 1 # number of SoftPFReq hits
system.cpu.dcache.LoadLockedReq_hits::cpu.data 61 # number of LoadLockedReq hits
system.cpu.dcache.LoadLockedReq_hits::total 61 # number of LoadLockedReq hits
system.cpu.dcache.StoreCondReq_hits::cpu.data 61 # number of StoreCondReq hits
system.cpu.dcache.StoreCondReq_hits::total 61 # number of StoreCondReq hits
system.cpu.dcache.demand_hits::cpu.data 624504139 # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total 624504139 # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data 624504140 # number of overall hits
system.cpu.dcache.overall_hits::total 624504140 # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data 7333496 # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total 7333496 # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data 2256860 # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total 2256860 # number of WriteReq misses
system.cpu.dcache.SoftPFReq_misses::cpu.data 2 # number of SoftPFReq misses
system.cpu.dcache.SoftPFReq_misses::total 2 # number of SoftPFReq misses
system.cpu.dcache.demand_misses::cpu.data 9590356 # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total 9590356 # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data 9590358 # number of overall misses
system.cpu.dcache.overall_misses::total 9590358 # number of overall misses
system.cpu.dcache.ReadReq_miss_latency::cpu.data 208281810000 # number of ReadReq miss cycles
system.cpu.dcache.ReadReq_miss_latency::total 208281810000 # number of ReadReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::cpu.data 119887020500 # number of WriteReq miss cycles
system.cpu.dcache.WriteReq_miss_latency::total 119887020500 # number of WriteReq miss cycles
system.cpu.dcache.demand_miss_latency::cpu.data 328168830500 # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_latency::total 328168830500 # number of demand (read+write) miss cycles
system.cpu.dcache.overall_miss_latency::cpu.data 328168830500 # number of overall miss cycles
system.cpu.dcache.overall_miss_latency::total 328168830500 # number of overall miss cycles
system.cpu.dcache.ReadReq_accesses::cpu.data 461508448 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total 461508448 # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data 172586047 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total 172586047 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.SoftPFReq_accesses::cpu.data 3 # number of SoftPFReq accesses(hits+misses)
system.cpu.dcache.SoftPFReq_accesses::total 3 # number of SoftPFReq accesses(hits+misses)
system.cpu.dcache.LoadLockedReq_accesses::cpu.data 61 # number of LoadLockedReq accesses(hits+misses)
system.cpu.dcache.LoadLockedReq_accesses::total 61 # number of LoadLockedReq accesses(hits+misses)
system.cpu.dcache.StoreCondReq_accesses::cpu.data 61 # number of StoreCondReq accesses(hits+misses)
system.cpu.dcache.StoreCondReq_accesses::total 61 # number of StoreCondReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data 634094495 # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total 634094495 # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data 634094498 # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total 634094498 # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.015890 # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total 0.015890 # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013077 # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total 0.013077 # miss rate for WriteReq accesses
system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.666667 # miss rate for SoftPFReq accesses
system.cpu.dcache.SoftPFReq_miss_rate::total 0.666667 # miss rate for SoftPFReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data 0.015124 # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total 0.015124 # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data 0.015124 # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total 0.015124 # miss rate for overall accesses
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 28401.435005 # average ReadReq miss latency
system.cpu.dcache.ReadReq_avg_miss_latency::total 28401.435005 # average ReadReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 53121.159709 # average WriteReq miss latency
system.cpu.dcache.WriteReq_avg_miss_latency::total 53121.159709 # average WriteReq miss latency
system.cpu.dcache.demand_avg_miss_latency::cpu.data 34218.628641 # average overall miss latency
system.cpu.dcache.demand_avg_miss_latency::total 34218.628641 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::cpu.data 34218.621505 # average overall miss latency
system.cpu.dcache.overall_avg_miss_latency::total 34218.621505 # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.dcache.writebacks::writebacks 3670078 # number of writebacks
system.cpu.dcache.writebacks::total 3670078 # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data 49 # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total 49 # number of ReadReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::cpu.data 366027 # number of WriteReq MSHR hits
system.cpu.dcache.WriteReq_mshr_hits::total 366027 # number of WriteReq MSHR hits
system.cpu.dcache.demand_mshr_hits::cpu.data 366076 # number of demand (read+write) MSHR hits
system.cpu.dcache.demand_mshr_hits::total 366076 # number of demand (read+write) MSHR hits
system.cpu.dcache.overall_mshr_hits::cpu.data 366076 # number of overall MSHR hits
system.cpu.dcache.overall_mshr_hits::total 366076 # number of overall MSHR hits
system.cpu.dcache.ReadReq_mshr_misses::cpu.data 7333447 # number of ReadReq MSHR misses
system.cpu.dcache.ReadReq_mshr_misses::total 7333447 # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data 1890833 # number of WriteReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::total 1890833 # number of WriteReq MSHR misses
system.cpu.dcache.SoftPFReq_mshr_misses::cpu.data 1 # number of SoftPFReq MSHR misses
system.cpu.dcache.SoftPFReq_mshr_misses::total 1 # number of SoftPFReq MSHR misses
system.cpu.dcache.demand_mshr_misses::cpu.data 9224280 # number of demand (read+write) MSHR misses
system.cpu.dcache.demand_mshr_misses::total 9224280 # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data 9224281 # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total 9224281 # number of overall MSHR misses
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 200943921500 # number of ReadReq MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_latency::total 200943921500 # number of ReadReq MSHR miss cycles
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 92449770000 # number of WriteReq MSHR miss cycles
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system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.014547 # mshr miss rate for overall accesses
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system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 27401.019125 # average ReadReq mshr miss latency
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system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 48893.672789 # average WriteReq mshr miss latency
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system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 90652.068127 # average ReadReq mshr miss latency
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system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 90652.068127 # average overall mshr miss latency
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system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 90652.068127 # average overall mshr miss latency
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system.cpu.l2cache.tags.age_task_id_blocks_1024::2 2946 # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::3 7191 # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4 21752 # Occupied blocks per task id
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system.cpu.l2cache.tags.data_accesses 149614963 # Number of data accesses
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system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 183707047000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.demand_mshr_miss_latency::total 183772060000 # number of demand (read+write) MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 65013000 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 183707047000 # number of overall MSHR miss cycles
system.cpu.l2cache.overall_mshr_miss_latency::total 183772060000 # number of overall MSHR miss cycles
system.cpu.l2cache.CleanEvict_mshr_miss_rate::writebacks inf # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.CleanEvict_mshr_miss_rate::total inf # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.429619 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.429619 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.954988 # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.954988 # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.170682 # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.170682 # mshr miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.954988 # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.223760 # mshr miss rate for demand accesses
system.cpu.l2cache.demand_mshr_miss_rate::total 0.223825 # mshr miss rate for demand accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.954988 # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.223760 # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total 0.223825 # mshr miss rate for overall accesses
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 86346.202566 # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 86346.202566 # average ReadExReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 82819.108280 # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 82819.108280 # average ReadCleanReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 90729.203101 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 90729.203101 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 82819.108280 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 89004.187930 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 89001.836487 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 82819.108280 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 89004.187930 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 89001.836487 # average overall mshr miss latency
system.cpu.toL2Bus.snoop_filter.tot_requests 18445321 # Total number of requests made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_requests 9220230 # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_requests 1594 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.snoop_filter.tot_snoops 1444 # Total number of snoops made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1438 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 6 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.cpu.toL2Bus.trans_dist::ReadResp 7334270 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WritebackDirty 4730251 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WritebackClean 33 # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict 6522313 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 1890833 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 1890833 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadCleanReq 822 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadSharedReq 7333448 # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1677 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 27668747 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total 27670424 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 54720 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 825238976 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total 825293696 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops 2032379 # Total snoops (count)
system.cpu.toL2Bus.snoopTraffic 67851072 # Total snoop traffic (bytes)
system.cpu.toL2Bus.snoop_fanout::samples 11257482 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean 0.000271 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev 0.016506 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0 11254432 99.97% 99.97% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1 3044 0.03% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2 6 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total 11257482 # Request fanout histogram
system.cpu.toL2Bus.reqLayer0.occupancy 12892771500 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 1.1 # Layer utilization (%)
system.cpu.toL2Bus.respLayer0.occupancy 1233000 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 13836424993 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.2 # Layer utilization (%)
system.membus.snoop_filter.tot_requests 4095962 # Total number of requests made to the snoop filter.
system.membus.snoop_filter.hit_single_requests 2031307 # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.membus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.membus.pwrStateResidencyTicks::UNDEFINED 1150356296500 # Cumulative time (in ticks) in various power states
system.membus.trans_dist::ReadResp 1252474 # Transaction distribution
system.membus.trans_dist::WritebackDirty 1060173 # Transaction distribution
system.membus.trans_dist::CleanEvict 970977 # Transaction distribution
system.membus.trans_dist::ReadExReq 812338 # Transaction distribution
system.membus.trans_dist::ReadExResp 812338 # Transaction distribution
system.membus.trans_dist::ReadSharedReq 1252474 # Transaction distribution
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 6160774 # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total 6160774 # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 199999040 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total 199999040 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 0 # Total snoops (count)
system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
system.membus.snoop_fanout::samples 2064812 # Request fanout histogram
system.membus.snoop_fanout::mean 0 # Request fanout histogram
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::0 2064812 100.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
system.membus.snoop_fanout::total 2064812 # Request fanout histogram
system.membus.reqLayer0.occupancy 8805297000 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.8 # Layer utilization (%)
system.membus.respLayer1.occupancy 11285202500 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 1.0 # Layer utilization (%)
---------- End Simulation Statistics ----------