arch: Make the decoder decode() method virtual.

Change-Id: I60f0c4ffbd63069caaee190a78f007df79b61808
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52078
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 56be00d..b99ac4f 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -137,18 +137,7 @@
 
     void moreBytes(const PCStateBase &pc, Addr fetchPC) override;
 
-    /**
-     * Decode an instruction or fetch it from the code cache.
-     *
-     * This method decodes the currently pending pre-decoded
-     * instruction. Data must be fed to the decoder using moreBytes()
-     * until instReady() is true before calling this method.
-     *
-     * @param pc Instruction pointer that we are decoding.
-     * @return A pointer to a static instruction or NULL if the
-     * decoder isn't ready (see instReady()).
-     */
-    StaticInstPtr decode(PCStateBase &pc);
+    StaticInstPtr decode(PCStateBase &pc) override;
 
   public: // ARM-specific decoder state manipulation
     void
diff --git a/src/arch/generic/decoder.hh b/src/arch/generic/decoder.hh
index aecde07..6d828a2 100644
--- a/src/arch/generic/decoder.hh
+++ b/src/arch/generic/decoder.hh
@@ -124,6 +124,19 @@
      * @param fetchPC The address this chunk was fetched from.
      */
     virtual void moreBytes(const PCStateBase &pc, Addr fetchPC) = 0;
+
+    /**
+     * Decode an instruction or fetch it from the code cache.
+     *
+     * This method decodes the currently pending pre-decoded
+     * instruction. Data must be fed to the decoder using moreBytes()
+     * until instReady() is true before calling this method.
+     *
+     * @param pc Instruction pointer that we are decoding.
+     * @return A pointer to a static instruction or NULL if the
+     * decoder isn't ready (see instReady()).
+     */
+    virtual StaticInstPtr decode(PCStateBase &pc) = 0;
 };
 
 } // namespace gem5
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index eeb1c77..815a437 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -85,7 +85,7 @@
 
   public:
     StaticInstPtr
-    decode(PCStateBase &next_pc)
+    decode(PCStateBase &next_pc) override
     {
         if (!instDone)
             return NULL;
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index 79bfb0a..c5e7e27 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -82,7 +82,7 @@
 
   public:
     StaticInstPtr
-    decode(PCStateBase &next_pc)
+    decode(PCStateBase &next_pc) override
     {
         if (!instDone)
             return NULL;
diff --git a/src/arch/riscv/decoder.hh b/src/arch/riscv/decoder.hh
index 3be8a80..8e6bc80 100644
--- a/src/arch/riscv/decoder.hh
+++ b/src/arch/riscv/decoder.hh
@@ -75,7 +75,7 @@
     //when there is control flow.
     void moreBytes(const PCStateBase &pc, Addr fetchPC) override;
 
-    StaticInstPtr decode(PCStateBase &nextPC);
+    StaticInstPtr decode(PCStateBase &nextPC) override;
 };
 
 } // namespace RiscvISA
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 6b7507fc..e42ecd2 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -101,7 +101,7 @@
 
   public:
     StaticInstPtr
-    decode(PCStateBase &next_pc)
+    decode(PCStateBase &next_pc) override
     {
         if (!instDone)
             return NULL;
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 1283088..cca6a1d 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -344,7 +344,7 @@
     }
 
   public:
-    StaticInstPtr decode(PCStateBase &next_pc);
+    StaticInstPtr decode(PCStateBase &next_pc) override;
 
     StaticInstPtr fetchRomMicroop(
             MicroPC micropc, StaticInstPtr curMacroop) override;