)]}'
{
  "commit": "451cb4cb7a94d1bd20a082d0cdfbb2460ac7990c",
  "tree": "3d3676874e142a53d4e18dea4b3f17b080cc8a1d",
  "parents": [
    "39108150ab041033b3317acc8fbb8bdfabfe3254"
  ],
  "author": {
    "name": "Peter",
    "email": "petery.hin@huawei.com",
    "time": "Thu Mar 18 16:43:15 2021 +0800"
  },
  "committer": {
    "name": "Peter Yuen",
    "email": "petery.hin@huawei.com",
    "time": "Wed Mar 24 02:48:14 2021 +0000"
  },
  "message": "arch-riscv: Fix Clint and SATP write side effects\n\nPreviously, RISC-V FS support was unable to support O3CPU.\nIt was due to two issues:\n\n1. CLINT was calling tc-\u003esetMiscRegNoEffect which triggers\na conditionalSquash on O3CPU. These frequent squashes led\nto assertion error in src/cpu/o3/inst_queue_impl.hh line\n1293 (we still suspect that the assertion might contain\nsome assumptions).\n\n2. A CSR write to SATP needs to trigger a squash (since\nMMU can be activated). This is done by conditionally\nadding the IsSquashAfter flag to CSR operations if the\ntarget is SATP. This is a simple fix. (Else, an auipc\nright after a CSR write to SATP might compute the wrong\nvalue). In the future, a better implementation should\nonly set the flag for writes to the relevant bit(s).\n\nChange-Id: Ieb9fd0b9aa09e4d2f270b28c2297ea821a81bf65\nReviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43244\nMaintainer: Bobby R. Bruce \u003cbbruce@ucdavis.edu\u003e\nTested-by: kokoro \u003cnoreply+kokoro@google.com\u003e\nReviewed-by: Ayaz Akram \u003cyazakram@ucdavis.edu\u003e\nReviewed-by: Peter Yuen \u003cpetery.hin@huawei.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "aa949422c6d6fb677e591e8a0d82f594962fbd39",
      "old_mode": 33188,
      "old_path": "src/arch/riscv/insts/standard.hh",
      "new_id": "709c9441dde69e6a4db07a0f337261094fb39a5a",
      "new_mode": 33188,
      "new_path": "src/arch/riscv/insts/standard.hh"
    },
    {
      "type": "modify",
      "old_id": "d36dc1dcb81c46c91c5509ad959c655960b6b086",
      "old_mode": 33188,
      "old_path": "src/arch/riscv/pma_checker.cc",
      "new_id": "15c5cf965ede8aa6eb4d6766151bc23b6088188e",
      "new_mode": 33188,
      "new_path": "src/arch/riscv/pma_checker.cc"
    },
    {
      "type": "modify",
      "old_id": "641ba6f773c0b65cbd27126faf17db4d2192aafd",
      "old_mode": 33188,
      "old_path": "src/dev/riscv/clint.cc",
      "new_id": "ced91223be629a24ae3e6a00ca7aae893580bce1",
      "new_mode": 33188,
      "new_path": "src/dev/riscv/clint.cc"
    }
  ]
}