mem-ruby, arch-hsail: Removed hit latency from VIPERCoalescer
Removed the dcache hit latency from VIPERCoalescer so HSAIL_X86
compiles after commit 496d5ed3e1f7dad42b0c2ebe0050d84621be8f99
Change-Id: I050a58d90f0f6356824c3c3bcb3f0b3c76d145e0
Signed-off-by: Pablo Prieto <pablo.prieto@unican.es>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19148
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
1 file changed
