arch-riscv: Added PMA support for RiscvTLB
Since the RISC-V privileged specs V1.11 did not specify
an implementation of physical memory attributes (PMA), e.g.
cacheability, an abstract PMAChecker class is created. This
class acts as a generic PMAChecker hardware without any
latency modelling.
The TLB finds the PMAChecker defined at the MMU level by
Parent.any.
Change-Id: I4400133895be44da67536d80b82422ec3a49d786
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40596
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
10 files changed
