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Import('*')

Source('htm.cc')
Source('mmu.cc')

SimObject('BaseInterrupts.py', sim_objects=['BaseInterrupts'])
SimObject('BaseISA.py', sim_objects=['BaseISA'])
SimObject('BaseMMU.py', sim_objects=['BaseMMU'])
SimObject('BaseTLB.py', sim_objects=['BaseTLB'], enums=['TypeTLB'])
SimObject('InstDecoder.py', sim_objects=['InstDecoder'])

DebugFlag('PageTableWalker',
          "Page table walker state machine debugging")
DebugFlag('TLB')

GTest('vec_reg.test', 'vec_reg.test.cc')
GTest('vec_pred_reg.test', 'vec_pred_reg.test.cc')

Source('decoder.cc')