commit 5a9fb5a2bffe37bbfc525137946e6bc0809f6578
author Gabor Dozsa <gabor.dozsa@arm.com> Thu Nov 15 17:21:57 2018 +0000
committer Giacomo Gabrielli <giacomo.gabrielli@arm.com> Sun Jul 28 16:28:43 2019 +0000
tree 49fb4e98c3ed00567fea35fd2869c94c8f2fc24e
parent fc7cb70a7231bb7a92413d1f8b43c9f4ef6c8690

cpu-o3: Fix too strict assert condition in writeback()

The assert() in the LSQ writeback() only allowed ReExec faults.
However, a SplitRequest which completed the translation in
PartialFault state (i.e. any but the very first cacheline
translation failed) may end up here. The assert() condition is
extended accordingly.

The patch also removes the superfluous/unused Complete/Squashed
states from the LSQ request. (The completion of the request is
recorded in the flags still.)

Change-Id: Ie575f4d3b4d5295585828ad8c7d3f4c7c1fe15d0
Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19174
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

src/cpu/o3/lsq.hh

diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh
index 6f78201..4701a8c 100644
--- a/src/cpu/o3/lsq.hh
+++ b/src/cpu/o3/lsq.hh
@@ -223,8 +223,6 @@
             NotIssued,
             Translation,
             Request,
-            Complete,
-            Squashed,
             Fault,
             PartialFault,
         };

src/cpu/o3/lsq_impl.hh

diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 27a5630..a028424 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -985,7 +985,6 @@
 {
     assert(_numOutstandingPackets == 1);
     auto state = dynamic_cast<LSQSenderState*>(pkt->senderState);
-    setState(State::Complete);
     flags.set(Flag::Complete);
     state->outstanding--;
     assert(pkt == _packets.front());
@@ -1005,7 +1004,6 @@
     numReceivedPackets++;
     state->outstanding--;
     if (numReceivedPackets == _packets.size()) {
-        setState(State::Complete);
         flags.set(Flag::Complete);
         /* Assemble packets. */
         PacketPtr resp = isLoad()

src/cpu/o3/lsq_unit_impl.hh

diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index b71ed7f..c2483d5 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -968,8 +968,10 @@
             // the access as this discards the current fault.
 
             // If we have an outstanding fault, the fault should only be of
-            // type ReExec.
-            assert(dynamic_cast<ReExec*>(inst->fault.get()) != nullptr);
+            // type ReExec or - in case of a SplitRequest - a partial
+            // translation fault
+            assert(dynamic_cast<ReExec*>(inst->fault.get()) != nullptr ||
+                   inst->savedReq->isPartialFault());
 
             DPRINTF(LSQUnit, "Not completing instruction [sn:%lli] access "
                     "due to pending fault.\n", inst->seqNum);