/*
 * Copyright 2019 Google, Inc.
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 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
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 * neither the name of the copyright holders nor the names of its
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 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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#include "arch/arm/fastmodel/iris/cpu.hh"

#include "arch/arm/fastmodel/iris/thread_context.hh"
#include "scx/scx.h"
#include "sim/serialize.hh"

namespace Iris
{

BaseCPU::BaseCPU(const BaseCPUParams &params, sc_core::sc_module *_evs) :
    ::BaseCPU::BaseCPU(params), evs(_evs),
    evs_base_cpu(dynamic_cast<Iris::BaseCpuEvs *>(_evs))
{
    panic_if(!evs_base_cpu, "EVS should be of type BaseCpuEvs");

    // Make sure fast model knows we're using debugging mechanisms to control
    // the simulation, and it shouldn't shut down if simulation time stops
    // for some reason. Despite the misleading name, this doesn't start a CADI
    // server because it's first parameter is false.
    scx::scx_start_cadi_server(false, false, true);
}

BaseCPU::~BaseCPU()
{
    for (auto &tc: threadContexts)
        delete tc;
    threadContexts.clear();
}

Counter
BaseCPU::totalInsts() const
{
    Counter count = 0;
    for (auto *tc: threadContexts)
        count += tc->getCurrentInstCount();
    return count;
}

void
BaseCPU::init()
{
    ::BaseCPU::init();
    for (auto *tc: threadContexts)
        tc->initMemProxies(tc);
}

void
BaseCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
    ::serialize(*threadContexts[tid], cp);
}

} // namespace Iris