tree 37bc39c9002ddee2dfe9c95ef7e189a0039a709f
parent a3ac8caba9dba103d61d4b75b1ea3f8061cfabf4
author Chun-Chen TK Hsu <chunchenhsu@google.com> 1563879076 +0800
committer Chun-Chen TK Hsu <chunchenhsu@google.com> 1564478454 +0000

system-arm: Initialize ICC_SRE_EL3 register

Fast model CPU will throw exceptions if ICC_SRE_EL3 is not initialized
before accessing other interrupt controller system registers.

Change-Id: I638f77aa7a3a4ad92abf2554d039c37601fbd44f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19649
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>