arch-arm: Fix tracing code for SVE gather

Printing the entire contents of the dest vecreg for each gather
microop is suboptimal as it creates false positive differences
between Atomic and O3 traces. This fix prints only the memory
data which a microop loads from memory.

Change-Id: Idd8e0b26a96f9c9cc0b69360174bedf6a9f6dcb5
Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19171
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/arm/isa/templates/sve_mem.isa b/src/arch/arm/isa/templates/sve_mem.isa
index dced5f4..3085eca 100644
--- a/src/arch/arm/isa/templates/sve_mem.isa
+++ b/src/arch/arm/isa/templates/sve_mem.isa
@@ -1,4 +1,4 @@
-// Copyright (c) 2017-2018 ARM Limited
+// Copyright (c) 2017-2019 ARM Limited
 // All rights reserved
 //
 // The license below extends only to copyright in the software and shall
@@ -560,7 +560,9 @@
         if (fault == NoFault) {
             %(fault_status_reset_code)s;
             %(memacc_code)s;
-            %(op_wb)s;
+            if (traceData) {
+                traceData->setData(memData);
+            }
         } else {
             %(fault_status_set_code)s;
             if (firstFault) {
@@ -572,7 +574,9 @@
                   fault = NoFault;
                   memData = 0;
                   %(memacc_code)s;
-                  %(op_wb)s;
+                  if (traceData) {
+                      traceData->setData(memData);
+                  }
                }
             }
         }
@@ -638,7 +642,9 @@
         }
 
         %(memacc_code)s;
-        %(op_wb)s;
+        if (traceData) {
+            traceData->setData(memData);
+        }
 
         return NoFault;
     }