src/arch/arm/isa/templates/branch.isa

// -*- mode:c++ -*-

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def template BranchImmCondDeclare {{
class %(class_name)s : public %(base_class)s
{
  private:
    %(reg_idx_arr_decl)s;

  public:
    // Constructor
    %(class_name)s(ExtMachInst machInst, int32_t _imm,
                   ConditionCode _condCode);
    Fault execute(ExecContext *, Trace::InstRecord *) const override;
    std::unique_ptr<PCStateBase> branchTarget(
            const PCStateBase &branch_pc) const override;

    /// Explicitly import the otherwise hidden branchTarget
    using StaticInst::branchTarget;
};
}};

def template BranchImmCondConstructor {{
    %(class_name)s::%(class_name)s(ExtMachInst machInst, int32_t _imm,
                                   ConditionCode _condCode) :
        %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _condCode)
    {
        %(set_reg_idx_arr)s;
        %(constructor)s;
        if (!(condCode == COND_AL || condCode == COND_UC)) {
            for (int x = 0; x < _numDestRegs; x++) {
                setSrcRegIdx(_numSrcRegs++, destRegIdx(x));
            }
            flags[IsCondControl] = true;
        } else {
            flags[IsUncondControl] = true;
        }
    }
}};

def template BranchRegCondDeclare {{
class %(class_name)s : public %(base_class)s
{
  private:
    %(reg_idx_arr_decl)s;

  public:
    // Constructor
    %(class_name)s(ExtMachInst machInst, RegIndex _op1,
                   ConditionCode _condCode);
    Fault execute(ExecContext *, Trace::InstRecord *) const override;
};
}};

def template BranchRegCondConstructor {{
    %(class_name)s::%(class_name)s(ExtMachInst machInst, RegIndex _op1,
                                   ConditionCode _condCode) :
        %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _condCode)
    {
        %(set_reg_idx_arr)s;
        %(constructor)s;
        if (!(condCode == COND_AL || condCode == COND_UC)) {
            for (int x = 0; x < _numDestRegs; x++) {
                setSrcRegIdx(_numSrcRegs++, destRegIdx(x));
            }
            flags[IsCondControl] = true;
        } else {
            flags[IsUncondControl] = true;
        }
        if (%(is_ras_pop)s)
            flags[IsReturn] = true;
    }
}};

def template BranchTableDeclare {{
class %(class_name)s : public %(base_class)s
{
  private:
    %(reg_idx_arr_decl)s;

  public:
    // Constructor
    %(class_name)s(ExtMachInst machInst, RegIndex _op1, RegIndex _op2);
    Fault execute(ExecContext *, Trace::InstRecord *) const override;
    Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override;
    Fault completeAcc(PacketPtr, ExecContext *,
                      Trace::InstRecord *) const override;
};
}};

def template BranchRegRegConstructor {{
    %(class_name)s::%(class_name)s(ExtMachInst machInst,
                                   RegIndex _op1, RegIndex _op2) :
        %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2)
    {
        %(set_reg_idx_arr)s;
        %(constructor)s;
        if (!(condCode == COND_AL || condCode == COND_UC)) {
            for (int x = 0; x < _numDestRegs; x++) {
                setSrcRegIdx(_numSrcRegs++, destRegIdx(x));
            }
            flags[IsCondControl] = true;
        } else {
            flags[IsUncondControl] = true;
        }
    }
}};

def template BranchImmRegDeclare {{
class %(class_name)s : public %(base_class)s
{
  private:
    %(reg_idx_arr_decl)s;

  public:
    // Constructor
    %(class_name)s(ExtMachInst machInst, int32_t imm, RegIndex _op1);
    Fault execute(ExecContext *, Trace::InstRecord *) const override;
    std::unique_ptr<PCStateBase> branchTarget(
            const PCStateBase &branch_pc) const override;

    /// Explicitly import the otherwise hidden branchTarget
    using StaticInst::branchTarget;
};
}};

// Only used by CBNZ, CBZ which is conditional based on
// a register value even though the instruction is always unconditional.
def template BranchImmRegConstructor {{
    %(class_name)s::%(class_name)s(ExtMachInst machInst, int32_t _imm,
                                   RegIndex _op1) :
        %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _op1)
    {
        %(set_reg_idx_arr)s;
        %(constructor)s;
        flags[IsCondControl] = true;
    }
}};

def template BranchTarget {{

    std::unique_ptr<PCStateBase>
    %(class_name)s::branchTarget(const PCStateBase &branch_pc) const
    {
        %(op_decl)s;
        %(op_rd)s;

        PCStateBase *pc_ptr = branch_pc.clone();
        auto &pcs = pc_ptr->as<ArmISA::PCState>();
        %(brTgtCode)s
        pcs.advance();
        return std::unique_ptr<PCStateBase>{pc_ptr};
    }
}};