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# Copyright (c) 2021 The Regents of the University of California
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#
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# redistributions in binary form must reproduce the above copyright
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# neither the name of the copyright holders nor the names of its
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# this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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from ...utils.override import overrides
from ..boards.mem_mode import MemMode
from ..processors.simple_core import SimpleCore
from m5.util import warn
from .abstract_processor import AbstractProcessor
from .cpu_types import CPUTypes
from ..boards.abstract_board import AbstractBoard
class SimpleProcessor(AbstractProcessor):
"""
A SimpeProcessor contains a number of cores of a a single CPUType.
"""
def __init__(self, cpu_type: CPUTypes, num_cores: int) -> None:
super().__init__(
cores=self._create_cores(
cpu_type=cpu_type,
num_cores=num_cores,
)
)
self._cpu_type = cpu_type
if self._cpu_type == CPUTypes.KVM:
from m5.objects import KvmVM
self.kvm_vm = KvmVM()
def _create_cores(self, cpu_type: CPUTypes, num_cores: int):
return [
SimpleCore(cpu_type=cpu_type, core_id=i) for i in range(num_cores)
]
@overrides(AbstractProcessor)
def incorporate_processor(self, board: AbstractBoard) -> None:
if self._cpu_type == CPUTypes.KVM:
board.kvm_vm = self.kvm_vm
# Set the memory mode.
if self._cpu_type == CPUTypes.TIMING or self._cpu_type == CPUTypes.O3:
board.set_mem_mode(MemMode.TIMING)
elif self._cpu_type == CPUTypes.KVM:
board.set_mem_mode(MemMode.ATOMIC_NONCACHING)
elif self._cpu_type == CPUTypes.ATOMIC:
if board.get_cache_hierarchy().is_ruby():
warn(
"Using an atomic core with Ruby will result in "
"'atomic_noncaching' memory mode. This will skip caching "
"completely."
)
else:
board.set_mem_mode(MemMode.ATOMIC)
else:
raise NotImplementedError
if self._cpu_type == CPUTypes.KVM:
# To get the KVM CPUs to run on different host CPUs
# Specify a different event queue for each CPU
for i, core in enumerate(self.cores):
for obj in core.get_simobject().descendants():
obj.eventq_index = 0
core.get_simobject().eventq_index = i + 1