| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 1.046047 |
| sim_ticks 1046047111500 |
| final_tick 1046047111500 |
| sim_freq 1000000000000 |
| host_inst_rate 550252 |
| host_op_rate 676018 |
| host_tick_rate 900249421 |
| host_mem_usage 289500 |
| host_seconds 1161.95 |
| sim_insts 639366787 |
| sim_ops 785501035 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.physmem.bytes_read::cpu.inst 112576 |
| system.physmem.bytes_read::cpu.data 18471424 |
| system.physmem.bytes_read::total 18584000 |
| system.physmem.bytes_inst_read::cpu.inst 112576 |
| system.physmem.bytes_inst_read::total 112576 |
| system.physmem.bytes_written::writebacks 4230272 |
| system.physmem.bytes_written::total 4230272 |
| system.physmem.num_reads::cpu.inst 1759 |
| system.physmem.num_reads::cpu.data 288616 |
| system.physmem.num_reads::total 290375 |
| system.physmem.num_writes::writebacks 66098 |
| system.physmem.num_writes::total 66098 |
| system.physmem.bw_read::cpu.inst 107620 |
| system.physmem.bw_read::cpu.data 17658310 |
| system.physmem.bw_read::total 17765930 |
| system.physmem.bw_inst_read::cpu.inst 107620 |
| system.physmem.bw_inst_read::total 107620 |
| system.physmem.bw_write::writebacks 4044055 |
| system.physmem.bw_write::total 4044055 |
| system.physmem.bw_total::writebacks 4044055 |
| system.physmem.bw_total::cpu.inst 107620 |
| system.physmem.bw_total::cpu.data 17658310 |
| system.physmem.bw_total::total 21809985 |
| system.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 |
| system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 |
| system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.accesses 0 |
| system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.dtb.walker.walks 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.dtb.walker.walkRequestOrigin::total 0 |
| system.cpu.dtb.inst_hits 0 |
| system.cpu.dtb.inst_misses 0 |
| system.cpu.dtb.read_hits 0 |
| system.cpu.dtb.read_misses 0 |
| system.cpu.dtb.write_hits 0 |
| system.cpu.dtb.write_misses 0 |
| system.cpu.dtb.flush_tlb 0 |
| system.cpu.dtb.flush_tlb_mva 0 |
| system.cpu.dtb.flush_tlb_mva_asid 0 |
| system.cpu.dtb.flush_tlb_asid 0 |
| system.cpu.dtb.flush_entries 0 |
| system.cpu.dtb.align_faults 0 |
| system.cpu.dtb.prefetch_faults 0 |
| system.cpu.dtb.domain_faults 0 |
| system.cpu.dtb.perms_faults 0 |
| system.cpu.dtb.read_accesses 0 |
| system.cpu.dtb.write_accesses 0 |
| system.cpu.dtb.inst_accesses 0 |
| system.cpu.dtb.hits 0 |
| system.cpu.dtb.misses 0 |
| system.cpu.dtb.accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 |
| system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.read_hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.read_misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.write_hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.write_misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 |
| system.cpu.istage2_mmu.stage2_tlb.align_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.accesses 0 |
| system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.itb.walker.walks 0 |
| system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.itb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.itb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.itb.walker.walkRequestOrigin::total 0 |
| system.cpu.itb.inst_hits 0 |
| system.cpu.itb.inst_misses 0 |
| system.cpu.itb.read_hits 0 |
| system.cpu.itb.read_misses 0 |
| system.cpu.itb.write_hits 0 |
| system.cpu.itb.write_misses 0 |
| system.cpu.itb.flush_tlb 0 |
| system.cpu.itb.flush_tlb_mva 0 |
| system.cpu.itb.flush_tlb_mva_asid 0 |
| system.cpu.itb.flush_tlb_asid 0 |
| system.cpu.itb.flush_entries 0 |
| system.cpu.itb.align_faults 0 |
| system.cpu.itb.prefetch_faults 0 |
| system.cpu.itb.domain_faults 0 |
| system.cpu.itb.perms_faults 0 |
| system.cpu.itb.read_accesses 0 |
| system.cpu.itb.write_accesses 0 |
| system.cpu.itb.inst_accesses 0 |
| system.cpu.itb.hits 0 |
| system.cpu.itb.misses 0 |
| system.cpu.itb.accesses 0 |
| system.cpu.workload.numSyscalls 673 |
| system.cpu.pwrStateResidencyTicks::ON 1046047111500 |
| system.cpu.numCycles 2092094223 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.committedInsts 639366787 |
| system.cpu.committedOps 785501035 |
| system.cpu.num_int_alu_accesses 682251400 |
| system.cpu.num_fp_alu_accesses 24239771 |
| system.cpu.num_func_calls 37261296 |
| system.cpu.num_conditional_control_insts 91575866 |
| system.cpu.num_int_insts 682251400 |
| system.cpu.num_fp_insts 24239771 |
| system.cpu.num_int_register_reads 1272307653 |
| system.cpu.num_int_register_writes 468423268 |
| system.cpu.num_fp_register_reads 28064643 |
| system.cpu.num_fp_register_writes 21684311 |
| system.cpu.num_cc_register_reads 3116296060 |
| system.cpu.num_cc_register_writes 351919006 |
| system.cpu.num_mem_refs 381221435 |
| system.cpu.num_load_insts 252240938 |
| system.cpu.num_store_insts 128980497 |
| system.cpu.num_idle_cycles 0 |
| system.cpu.num_busy_cycles 2092094223 |
| system.cpu.not_idle_fraction 1 |
| system.cpu.idle_fraction 0 |
| system.cpu.Branches 137364860 |
| system.cpu.op_class::No_OpClass 0 0.00% 0.00% |
| system.cpu.op_class::IntAlu 385757467 48.91% 48.91% |
| system.cpu.op_class::IntMult 5173441 0.66% 49.56% |
| system.cpu.op_class::IntDiv 0 0.00% 49.56% |
| system.cpu.op_class::FloatAdd 0 0.00% 49.56% |
| system.cpu.op_class::FloatCmp 0 0.00% 49.56% |
| system.cpu.op_class::FloatCvt 0 0.00% 49.56% |
| system.cpu.op_class::FloatMult 0 0.00% 49.56% |
| system.cpu.op_class::FloatMultAcc 0 0.00% 49.56% |
| system.cpu.op_class::FloatDiv 0 0.00% 49.56% |
| system.cpu.op_class::FloatMisc 0 0.00% 49.56% |
| system.cpu.op_class::FloatSqrt 0 0.00% 49.56% |
| system.cpu.op_class::SimdAdd 0 0.00% 49.56% |
| system.cpu.op_class::SimdAddAcc 0 0.00% 49.56% |
| system.cpu.op_class::SimdAlu 0 0.00% 49.56% |
| system.cpu.op_class::SimdCmp 0 0.00% 49.56% |
| system.cpu.op_class::SimdCvt 0 0.00% 49.56% |
| system.cpu.op_class::SimdMisc 0 0.00% 49.56% |
| system.cpu.op_class::SimdMult 0 0.00% 49.56% |
| system.cpu.op_class::SimdMultAcc 0 0.00% 49.56% |
| system.cpu.op_class::SimdShift 0 0.00% 49.56% |
| system.cpu.op_class::SimdShiftAcc 0 0.00% 49.56% |
| system.cpu.op_class::SimdSqrt 0 0.00% 49.56% |
| system.cpu.op_class::SimdFloatAdd 637528 0.08% 49.65% |
| system.cpu.op_class::SimdFloatAlu 0 0.00% 49.65% |
| system.cpu.op_class::SimdFloatCmp 3187668 0.40% 50.05% |
| system.cpu.op_class::SimdFloatCvt 2550131 0.32% 50.37% |
| system.cpu.op_class::SimdFloatDiv 0 0.00% 50.37% |
| system.cpu.op_class::SimdFloatMisc 10203074 1.29% 51.67% |
| system.cpu.op_class::SimdFloatMult 0 0.00% 51.67% |
| system.cpu.op_class::SimdFloatMultAcc 0 0.00% 51.67% |
| system.cpu.op_class::SimdFloatSqrt 0 0.00% 51.67% |
| system.cpu.op_class::MemRead 245222568 31.09% 82.76% |
| system.cpu.op_class::MemWrite 125149823 15.87% 98.62% |
| system.cpu.op_class::FloatMemRead 7018370 0.89% 99.51% |
| system.cpu.op_class::FloatMemWrite 3830674 0.49% 100.00% |
| system.cpu.op_class::IprAccess 0 0.00% 100.00% |
| system.cpu.op_class::InstPrefetch 0 0.00% 100.00% |
| system.cpu.op_class::total 788730744 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.dcache.tags.replacements 778046 |
| system.cpu.dcache.tags.tagsinuse 4093.536872 |
| system.cpu.dcache.tags.total_refs 378510311 |
| system.cpu.dcache.tags.sampled_refs 782142 |
| system.cpu.dcache.tags.avg_refs 483.940654 |
| system.cpu.dcache.tags.warmup_cycle 1048273500 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 4093.536872 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.999399 |
| system.cpu.dcache.tags.occ_percent::total 0.999399 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 27 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 122 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::2 591 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::3 1037 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::4 2319 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 1 |
| system.cpu.dcache.tags.tag_accesses 759367050 |
| system.cpu.dcache.tags.data_accesses 759367050 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 249613198 |
| system.cpu.dcache.ReadReq_hits::total 249613198 |
| system.cpu.dcache.WriteReq_hits::cpu.data 128882154 |
| system.cpu.dcache.WriteReq_hits::total 128882154 |
| system.cpu.dcache.SoftPFReq_hits::cpu.data 3481 |
| system.cpu.dcache.SoftPFReq_hits::total 3481 |
| system.cpu.dcache.LoadLockedReq_hits::cpu.data 5739 |
| system.cpu.dcache.LoadLockedReq_hits::total 5739 |
| system.cpu.dcache.StoreCondReq_hits::cpu.data 5739 |
| system.cpu.dcache.StoreCondReq_hits::total 5739 |
| system.cpu.dcache.demand_hits::cpu.data 378495352 |
| system.cpu.dcache.demand_hits::total 378495352 |
| system.cpu.dcache.overall_hits::cpu.data 378498833 |
| system.cpu.dcache.overall_hits::total 378498833 |
| system.cpu.dcache.ReadReq_misses::cpu.data 712681 |
| system.cpu.dcache.ReadReq_misses::total 712681 |
| system.cpu.dcache.WriteReq_misses::cpu.data 69323 |
| system.cpu.dcache.WriteReq_misses::total 69323 |
| system.cpu.dcache.SoftPFReq_misses::cpu.data 139 |
| system.cpu.dcache.SoftPFReq_misses::total 139 |
| system.cpu.dcache.demand_misses::cpu.data 782004 |
| system.cpu.dcache.demand_misses::total 782004 |
| system.cpu.dcache.overall_misses::cpu.data 782143 |
| system.cpu.dcache.overall_misses::total 782143 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 20392265000 |
| system.cpu.dcache.ReadReq_miss_latency::total 20392265000 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 4205904500 |
| system.cpu.dcache.WriteReq_miss_latency::total 4205904500 |
| system.cpu.dcache.demand_miss_latency::cpu.data 24598169500 |
| system.cpu.dcache.demand_miss_latency::total 24598169500 |
| system.cpu.dcache.overall_miss_latency::cpu.data 24598169500 |
| system.cpu.dcache.overall_miss_latency::total 24598169500 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 250325879 |
| system.cpu.dcache.ReadReq_accesses::total 250325879 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 128951477 |
| system.cpu.dcache.WriteReq_accesses::total 128951477 |
| system.cpu.dcache.SoftPFReq_accesses::cpu.data 3620 |
| system.cpu.dcache.SoftPFReq_accesses::total 3620 |
| system.cpu.dcache.LoadLockedReq_accesses::cpu.data 5739 |
| system.cpu.dcache.LoadLockedReq_accesses::total 5739 |
| system.cpu.dcache.StoreCondReq_accesses::cpu.data 5739 |
| system.cpu.dcache.StoreCondReq_accesses::total 5739 |
| system.cpu.dcache.demand_accesses::cpu.data 379277356 |
| system.cpu.dcache.demand_accesses::total 379277356 |
| system.cpu.dcache.overall_accesses::cpu.data 379280976 |
| system.cpu.dcache.overall_accesses::total 379280976 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.002847 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.002847 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.000538 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.000538 |
| system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.038398 |
| system.cpu.dcache.SoftPFReq_miss_rate::total 0.038398 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.002062 |
| system.cpu.dcache.demand_miss_rate::total 0.002062 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.002062 |
| system.cpu.dcache.overall_miss_rate::total 0.002062 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 28613.453986 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 28613.453986 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 60671.126466 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 60671.126466 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 31455.298822 |
| system.cpu.dcache.demand_avg_miss_latency::total 31455.298822 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 31449.708685 |
| system.cpu.dcache.overall_avg_miss_latency::total 31449.708685 |
| system.cpu.dcache.blocked_cycles::no_mshrs 0 |
| system.cpu.dcache.blocked_cycles::no_targets 0 |
| system.cpu.dcache.blocked::no_mshrs 0 |
| system.cpu.dcache.blocked::no_targets 0 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.dcache.avg_blocked_cycles::no_targets nan |
| system.cpu.dcache.writebacks::writebacks 88967 |
| system.cpu.dcache.writebacks::total 88967 |
| system.cpu.dcache.ReadReq_mshr_hits::cpu.data 1 |
| system.cpu.dcache.ReadReq_mshr_hits::total 1 |
| system.cpu.dcache.demand_mshr_hits::cpu.data 1 |
| system.cpu.dcache.demand_mshr_hits::total 1 |
| system.cpu.dcache.overall_mshr_hits::cpu.data 1 |
| system.cpu.dcache.overall_mshr_hits::total 1 |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 712680 |
| system.cpu.dcache.ReadReq_mshr_misses::total 712680 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 69323 |
| system.cpu.dcache.WriteReq_mshr_misses::total 69323 |
| system.cpu.dcache.SoftPFReq_mshr_misses::cpu.data 139 |
| system.cpu.dcache.SoftPFReq_mshr_misses::total 139 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 782003 |
| system.cpu.dcache.demand_mshr_misses::total 782003 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 782142 |
| system.cpu.dcache.overall_mshr_misses::total 782142 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 19679537000 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 19679537000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 4136581500 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 4136581500 |
| system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 1768000 |
| system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 1768000 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 23816118500 |
| system.cpu.dcache.demand_mshr_miss_latency::total 23816118500 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 23817886500 |
| system.cpu.dcache.overall_mshr_miss_latency::total 23817886500 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.002847 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.002847 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.000538 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.000538 |
| system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.038398 |
| system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.038398 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.002062 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.002062 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.002062 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.002062 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 27613.426783 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 27613.426783 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 59671.126466 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 59671.126466 |
| system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 12719.424460 |
| system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 12719.424460 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 30455.277665 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 30455.277665 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 30452.125701 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 30452.125701 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.icache.tags.replacements 8769 |
| system.cpu.icache.tags.tagsinuse 1391.373825 |
| system.cpu.icache.tags.total_refs 643367692 |
| system.cpu.icache.tags.sampled_refs 10208 |
| system.cpu.icache.tags.avg_refs 63025.831897 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 1391.373825 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.679382 |
| system.cpu.icache.tags.occ_percent::total 0.679382 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 1439 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 43 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 57 |
| system.cpu.icache.tags.age_task_id_blocks_1024::4 1339 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.702637 |
| system.cpu.icache.tags.tag_accesses 1286766008 |
| system.cpu.icache.tags.data_accesses 1286766008 |
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| system.cpu.icache.ReadReq_hits::total 643367692 |
| system.cpu.icache.demand_hits::cpu.inst 643367692 |
| system.cpu.icache.demand_hits::total 643367692 |
| system.cpu.icache.overall_hits::cpu.inst 643367692 |
| system.cpu.icache.overall_hits::total 643367692 |
| system.cpu.icache.ReadReq_misses::cpu.inst 10208 |
| system.cpu.icache.ReadReq_misses::total 10208 |
| system.cpu.icache.demand_misses::cpu.inst 10208 |
| system.cpu.icache.demand_misses::total 10208 |
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| system.cpu.icache.overall_misses::total 10208 |
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| system.cpu.icache.demand_miss_latency::cpu.inst 220829500 |
| system.cpu.icache.demand_miss_latency::total 220829500 |
| system.cpu.icache.overall_miss_latency::cpu.inst 220829500 |
| system.cpu.icache.overall_miss_latency::total 220829500 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 643377900 |
| system.cpu.icache.ReadReq_accesses::total 643377900 |
| system.cpu.icache.demand_accesses::cpu.inst 643377900 |
| system.cpu.icache.demand_accesses::total 643377900 |
| system.cpu.icache.overall_accesses::cpu.inst 643377900 |
| system.cpu.icache.overall_accesses::total 643377900 |
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| system.cpu.icache.ReadReq_miss_rate::total 0.000016 |
| system.cpu.icache.demand_miss_rate::cpu.inst 0.000016 |
| system.cpu.icache.demand_miss_rate::total 0.000016 |
| system.cpu.icache.overall_miss_rate::cpu.inst 0.000016 |
| system.cpu.icache.overall_miss_rate::total 0.000016 |
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| system.cpu.icache.ReadReq_avg_miss_latency::total 21632.983934 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 21632.983934 |
| system.cpu.icache.demand_avg_miss_latency::total 21632.983934 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 21632.983934 |
| system.cpu.icache.overall_avg_miss_latency::total 21632.983934 |
| system.cpu.icache.blocked_cycles::no_mshrs 0 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 0 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.writebacks::writebacks 8769 |
| system.cpu.icache.writebacks::total 8769 |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 10208 |
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| system.cpu.icache.demand_mshr_misses::cpu.inst 10208 |
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| system.cpu.icache.overall_mshr_misses::cpu.inst 10208 |
| system.cpu.icache.overall_mshr_misses::total 10208 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 210621500 |
| system.cpu.icache.ReadReq_mshr_miss_latency::total 210621500 |
| system.cpu.icache.demand_mshr_miss_latency::cpu.inst 210621500 |
| system.cpu.icache.demand_mshr_miss_latency::total 210621500 |
| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 210621500 |
| system.cpu.icache.overall_mshr_miss_latency::total 210621500 |
| system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.000016 |
| system.cpu.icache.ReadReq_mshr_miss_rate::total 0.000016 |
| system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.000016 |
| system.cpu.icache.demand_mshr_miss_rate::total 0.000016 |
| system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.000016 |
| system.cpu.icache.overall_mshr_miss_rate::total 0.000016 |
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| system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 20632.983934 |
| system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 20632.983934 |
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| system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 20632.983934 |
| system.cpu.icache.overall_avg_mshr_miss_latency::total 20632.983934 |
| system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.l2cache.tags.replacements 257791 |
| system.cpu.l2cache.tags.tagsinuse 32695.724167 |
| system.cpu.l2cache.tags.total_refs 1287496 |
| system.cpu.l2cache.tags.sampled_refs 290559 |
| system.cpu.l2cache.tags.avg_refs 4.431100 |
| system.cpu.l2cache.tags.warmup_cycle 4679738000 |
| system.cpu.l2cache.tags.occ_blocks::writebacks 22.200866 |
| system.cpu.l2cache.tags.occ_blocks::cpu.inst 45.803141 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 32627.720160 |
| system.cpu.l2cache.tags.occ_percent::writebacks 0.000678 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.001398 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.995719 |
| system.cpu.l2cache.tags.occ_percent::total 0.997794 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 32768 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 89 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 146 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::2 148 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::3 1440 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::4 30945 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 1 |
| system.cpu.l2cache.tags.tag_accesses 12914999 |
| system.cpu.l2cache.tags.data_accesses 12914999 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.l2cache.WritebackDirty_hits::writebacks 88967 |
| system.cpu.l2cache.WritebackDirty_hits::total 88967 |
| system.cpu.l2cache.WritebackClean_hits::writebacks 8752 |
| system.cpu.l2cache.WritebackClean_hits::total 8752 |
| system.cpu.l2cache.ReadExReq_hits::cpu.data 3230 |
| system.cpu.l2cache.ReadExReq_hits::total 3230 |
| system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 8449 |
| system.cpu.l2cache.ReadCleanReq_hits::total 8449 |
| system.cpu.l2cache.ReadSharedReq_hits::cpu.data 490296 |
| system.cpu.l2cache.ReadSharedReq_hits::total 490296 |
| system.cpu.l2cache.demand_hits::cpu.inst 8449 |
| system.cpu.l2cache.demand_hits::cpu.data 493526 |
| system.cpu.l2cache.demand_hits::total 501975 |
| system.cpu.l2cache.overall_hits::cpu.inst 8449 |
| system.cpu.l2cache.overall_hits::cpu.data 493526 |
| system.cpu.l2cache.overall_hits::total 501975 |
| system.cpu.l2cache.ReadExReq_misses::cpu.data 66093 |
| system.cpu.l2cache.ReadExReq_misses::total 66093 |
| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 1759 |
| system.cpu.l2cache.ReadCleanReq_misses::total 1759 |
| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 222523 |
| system.cpu.l2cache.ReadSharedReq_misses::total 222523 |
| system.cpu.l2cache.demand_misses::cpu.inst 1759 |
| system.cpu.l2cache.demand_misses::cpu.data 288616 |
| system.cpu.l2cache.demand_misses::total 290375 |
| system.cpu.l2cache.overall_misses::cpu.inst 1759 |
| system.cpu.l2cache.overall_misses::cpu.data 288616 |
| system.cpu.l2cache.overall_misses::total 290375 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 3998679500 |
| system.cpu.l2cache.ReadExReq_miss_latency::total 3998679500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 106512500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 106512500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 13462920000 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::total 13462920000 |
| system.cpu.l2cache.demand_miss_latency::cpu.inst 106512500 |
| system.cpu.l2cache.demand_miss_latency::cpu.data 17461599500 |
| system.cpu.l2cache.demand_miss_latency::total 17568112000 |
| system.cpu.l2cache.overall_miss_latency::cpu.inst 106512500 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 17461599500 |
| system.cpu.l2cache.overall_miss_latency::total 17568112000 |
| system.cpu.l2cache.WritebackDirty_accesses::writebacks 88967 |
| system.cpu.l2cache.WritebackDirty_accesses::total 88967 |
| system.cpu.l2cache.WritebackClean_accesses::writebacks 8752 |
| system.cpu.l2cache.WritebackClean_accesses::total 8752 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 69323 |
| system.cpu.l2cache.ReadExReq_accesses::total 69323 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 10208 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 10208 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 712819 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 712819 |
| system.cpu.l2cache.demand_accesses::cpu.inst 10208 |
| system.cpu.l2cache.demand_accesses::cpu.data 782142 |
| system.cpu.l2cache.demand_accesses::total 792350 |
| system.cpu.l2cache.overall_accesses::cpu.inst 10208 |
| system.cpu.l2cache.overall_accesses::cpu.data 782142 |
| system.cpu.l2cache.overall_accesses::total 792350 |
| system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.953407 |
| system.cpu.l2cache.ReadExReq_miss_rate::total 0.953407 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.172316 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.172316 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.312173 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.312173 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.172316 |
| system.cpu.l2cache.demand_miss_rate::cpu.data 0.369007 |
| system.cpu.l2cache.demand_miss_rate::total 0.366473 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.172316 |
| system.cpu.l2cache.overall_miss_rate::cpu.data 0.369007 |
| system.cpu.l2cache.overall_miss_rate::total 0.366473 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60500.801900 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60500.801900 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60552.870949 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60552.870949 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60501.251556 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60501.251556 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60552.870949 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60501.148585 |
| system.cpu.l2cache.demand_avg_miss_latency::total 60501.461903 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60552.870949 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60501.148585 |
| system.cpu.l2cache.overall_avg_miss_latency::total 60501.461903 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.writebacks::writebacks 66098 |
| system.cpu.l2cache.writebacks::total 66098 |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 66093 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 66093 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 1759 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 1759 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 222523 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 222523 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 1759 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 288616 |
| system.cpu.l2cache.demand_mshr_misses::total 290375 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 1759 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 288616 |
| system.cpu.l2cache.overall_mshr_misses::total 290375 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 3337749500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 3337749500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 88922500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 88922500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 11237690000 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 11237690000 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 88922500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 14575439500 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 14664362000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 88922500 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 14575439500 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 14664362000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.953407 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.953407 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.172316 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.172316 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.312173 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.312173 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.172316 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.369007 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.366473 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.172316 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.369007 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.366473 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500.801900 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500.801900 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50552.870949 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50552.870949 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50501.251556 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50501.251556 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50552.870949 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50501.148585 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.461903 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50552.870949 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50501.148585 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.461903 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 1579165 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 786845 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 1110 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 1590 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1583 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 7 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 723027 |
| system.cpu.toL2Bus.trans_dist::WritebackDirty 155065 |
| system.cpu.toL2Bus.trans_dist::WritebackClean 8769 |
| system.cpu.toL2Bus.trans_dist::CleanEvict 880772 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 69323 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 69323 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 10208 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 712819 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 29185 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2342330 |
| system.cpu.toL2Bus.pkt_count::total 2371515 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1214528 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 55750976 |
| system.cpu.toL2Bus.pkt_size::total 56965504 |
| system.cpu.toL2Bus.snoops 257791 |
| system.cpu.toL2Bus.snoopTraffic 4230272 |
| system.cpu.toL2Bus.snoop_fanout::samples 1050141 |
| system.cpu.toL2Bus.snoop_fanout::mean 0.002606 |
| system.cpu.toL2Bus.snoop_fanout::stdev 0.051116 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 1047411 99.74% 99.74% |
| system.cpu.toL2Bus.snoop_fanout::1 2723 0.26% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 7 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 2 |
| system.cpu.toL2Bus.snoop_fanout::total 1050141 |
| system.cpu.toL2Bus.reqLayer0.occupancy 887318500 |
| system.cpu.toL2Bus.reqLayer0.utilization 0.1 |
| system.cpu.toL2Bus.respLayer0.occupancy 15312000 |
| system.cpu.toL2Bus.respLayer0.utilization 0.0 |
| system.cpu.toL2Bus.respLayer1.occupancy 1173213000 |
| system.cpu.toL2Bus.respLayer1.utilization 0.1 |
| system.membus.snoop_filter.tot_requests 546577 |
| system.membus.snoop_filter.hit_single_requests 256223 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 1046047111500 |
| system.membus.trans_dist::ReadResp 224282 |
| system.membus.trans_dist::WritebackDirty 66098 |
| system.membus.trans_dist::CleanEvict 190103 |
| system.membus.trans_dist::ReadExReq 66093 |
| system.membus.trans_dist::ReadExResp 66093 |
| system.membus.trans_dist::ReadSharedReq 224282 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 836951 |
| system.membus.pkt_count::total 836951 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 22814272 |
| system.membus.pkt_size::total 22814272 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 290376 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 290376 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 290376 |
| system.membus.reqLayer0.occupancy 811341000 |
| system.membus.reqLayer0.utilization 0.1 |
| system.membus.respLayer1.occupancy 1451875000 |
| system.membus.respLayer1.utilization 0.1 |
| |
| ---------- End Simulation Statistics ---------- |
