tree 49b0b6de8e93c61af8bb2a9fed1fc233726ad569
parent c794f566407eb541a9c77216509c8e83a7ef481b
author Giacomo Travaglini <giacomo.travaglini@arm.com> 1603998225 +0000
committer Giacomo Travaglini <giacomo.travaglini@arm.com> 1604307036 +0000

kvm, arm: Add parameter to force simulation of Gicv2

By setting simulate_gic to True it will be possible to prevent
the simulation from using the host interrupt controller

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I7c7df798e07bfaddbc2f1e7dd981b6aff621a9d1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36795
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Hsuan Hsu <kugwa2000@gmail.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>