)]}'
{
  "id": "cc5ceb0b50b37cf101c3d6100aa862d2cb51cf43",
  "repo": "public/gem5",
  "revision": "8590243fef2e4ccaefde3af767496dec44c6eb33",
  "path": "src/mem/protocol/MOESI_AMD_Base-Region-dir.sm"
}
