arch-arm: adding register control flags enabling LSE implementation

Added changes on arch-arm architecture to accept Atomic instructions
following ARM v8.1 documentation. That includes enabling atomic bit
in ID registers and add have_lse variable into arm system.

Change-Id: Ic28d3215d74ff129142fb51cb2fa217d3b1482de
Reviewed-by: Giacomo Travaglini <>
Maintainer: Giacomo Travaglini <>
Tested-by: kokoro <>
5 files changed