
---------- Begin Simulation Statistics ----------
sim_seconds                                  5.112152                       # Number of seconds simulated
sim_ticks                                5112151729000                       # Number of ticks simulated
final_tick                               5112151729000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq                                 1000000000000                       # Frequency of simulated ticks
host_inst_rate                                1314225                       # Simulator instruction rate (inst/s)
host_op_rate                                  2690507                       # Simulator op (including micro ops) rate (op/s)
host_tick_rate                            33581335470                       # Simulator tick rate (ticks/s)
host_mem_usage                                 609616                       # Number of bytes of host memory used
host_seconds                                   152.23                       # Real time elapsed on the host
sim_insts                                   200067055                       # Number of instructions simulated
sim_ops                                     409581065                       # Number of ops (including micro ops) simulated
system.voltage_domain.voltage                       1                       # Voltage in Volts
system.clk_domain.clock                          1000                       # Clock period in ticks
system.physmem.bytes_read::cpu.dtb.walker           64                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.itb.walker          320                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.inst            846912                       # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data          10615104                       # Number of bytes read from this memory
system.physmem.bytes_read::pc.south_bridge.ide        28352                       # Number of bytes read from this memory
system.physmem.bytes_read::total             11490752                       # Number of bytes read from this memory
system.physmem.bytes_inst_read::cpu.inst       846912                       # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::total          846912                       # Number of instructions bytes read from this memory
system.physmem.bytes_written::writebacks      9269888                       # Number of bytes written to this memory
system.physmem.bytes_written::total           9269888                       # Number of bytes written to this memory
system.physmem.num_reads::cpu.dtb.walker            1                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.itb.walker            5                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.inst              13233                       # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data             165861                       # Number of read requests responded to by this memory
system.physmem.num_reads::pc.south_bridge.ide          443                       # Number of read requests responded to by this memory
system.physmem.num_reads::total                179543                       # Number of read requests responded to by this memory
system.physmem.num_writes::writebacks          144842                       # Number of write requests responded to by this memory
system.physmem.num_writes::total               144842                       # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.dtb.walker             13                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.itb.walker             63                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.inst               165666                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.data              2076445                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::pc.south_bridge.ide         5546                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::total                 2247733                       # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu.inst          165666                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::total             165666                       # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_write::writebacks           1813305                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_write::total                1813305                       # Write bandwidth from this memory (bytes/s)
system.physmem.bw_total::writebacks           1813305                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.dtb.walker            13                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.itb.walker            63                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.inst              165666                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data             2076445                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::pc.south_bridge.ide         5546                       # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total                4061038                       # Total bandwidth to/from this memory (bytes/s)
system.cpu_clk_domain.clock                       500                       # Clock period in ticks
system.cpu.apic_clk_domain.clock                 8000                       # Clock period in ticks
system.cpu.numCycles                      10224307424                       # number of cpu cycles simulated
system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
system.cpu.kern.inst.arm                            0                       # number of arm instructions executed
system.cpu.kern.inst.quiesce                        0                       # number of quiesce instructions executed
system.cpu.committedInsts                   200067055                       # Number of instructions committed
system.cpu.committedOps                     409581065                       # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses             374584177                       # Number of integer alu accesses
system.cpu.num_fp_alu_accesses                     48                       # Number of float alu accesses
system.cpu.num_func_calls                     2308905                       # number of times a function call or return occured
system.cpu.num_conditional_control_insts     40001120                       # number of instructions that are conditional controls
system.cpu.num_int_insts                    374584177                       # number of integer instructions
system.cpu.num_fp_insts                            48                       # number of float instructions
system.cpu.num_int_register_reads           682690924                       # number of times the integer registers were read
system.cpu.num_int_register_writes          323558192                       # number of times the integer registers were written
system.cpu.num_fp_register_reads                   48                       # number of times the floating registers were read
system.cpu.num_fp_register_writes                   0                       # number of times the floating registers were written
system.cpu.num_cc_register_reads            233837631                       # number of times the CC registers were read
system.cpu.num_cc_register_writes           157316591                       # number of times the CC registers were written
system.cpu.num_mem_refs                      35667176                       # number of memory refs
system.cpu.num_load_insts                    27243343                       # Number of load instructions
system.cpu.num_store_insts                    8423833                       # Number of store instructions
system.cpu.num_idle_cycles               9770322790.617842                       # Number of idle cycles
system.cpu.num_busy_cycles               453984633.382158                       # Number of busy cycles
system.cpu.not_idle_fraction                 0.044402                       # Percentage of non-idle cycles
system.cpu.idle_fraction                     0.955598                       # Percentage of idle cycles
system.cpu.Branches                          43152262                       # Number of branches fetched
system.cpu.op_class::No_OpClass                172765      0.04%      0.04% # Class of executed instruction
system.cpu.op_class::IntAlu                 373477070     91.18%     91.23% # Class of executed instruction
system.cpu.op_class::IntMult                   144574      0.04%     91.26% # Class of executed instruction
system.cpu.op_class::IntDiv                    123086      0.03%     91.29% # Class of executed instruction
system.cpu.op_class::FloatAdd                       0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::FloatCmp                       0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::FloatCvt                      16      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::FloatMult                      0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::FloatDiv                       0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::FloatSqrt                      0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdAdd                        0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdAddAcc                     0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdAlu                        0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdCmp                        0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdCvt                        0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdMisc                       0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdMult                       0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdMultAcc                    0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdShift                      0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdShiftAcc                   0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdSqrt                       0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatAdd                   0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatAlu                   0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatCmp                   0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatCvt                   0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatDiv                   0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatMisc                  0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatMult                  0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatMultAcc               0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt                  0      0.00%     91.29% # Class of executed instruction
system.cpu.op_class::MemRead                 27240752      6.65%     97.94% # Class of executed instruction
system.cpu.op_class::MemWrite                 8423833      2.06%    100.00% # Class of executed instruction
system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
system.cpu.op_class::total                  409582096                       # Class of executed instruction
system.cpu.dcache.tags.replacements           1621909                       # number of replacements
system.cpu.dcache.tags.tagsinuse           511.999425                       # Cycle average of tags in use
system.cpu.dcache.tags.total_refs            20181333                       # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs           1622421                       # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs             12.439024                       # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle           7549500                       # Cycle when the warmup percentage was hit.
system.cpu.dcache.tags.occ_blocks::cpu.data   511.999425                       # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data     0.999999                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total     0.999999                       # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0          282                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::1          202                       # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2           28                       # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses          88837527                       # Number of tag accesses
system.cpu.dcache.tags.data_accesses         88837527                       # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data     12023410                       # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total        12023410                       # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data      8096819                       # number of WriteReq hits
system.cpu.dcache.WriteReq_hits::total        8096819                       # number of WriteReq hits
system.cpu.dcache.SoftPFReq_hits::cpu.data        58904                       # number of SoftPFReq hits
system.cpu.dcache.SoftPFReq_hits::total         58904                       # number of SoftPFReq hits
system.cpu.dcache.demand_hits::cpu.data      20120229                       # number of demand (read+write) hits
system.cpu.dcache.demand_hits::total         20120229                       # number of demand (read+write) hits
system.cpu.dcache.overall_hits::cpu.data     20179133                       # number of overall hits
system.cpu.dcache.overall_hits::total        20179133                       # number of overall hits
system.cpu.dcache.ReadReq_misses::cpu.data       905268                       # number of ReadReq misses
system.cpu.dcache.ReadReq_misses::total        905268                       # number of ReadReq misses
system.cpu.dcache.WriteReq_misses::cpu.data       316618                       # number of WriteReq misses
system.cpu.dcache.WriteReq_misses::total       316618                       # number of WriteReq misses
system.cpu.dcache.SoftPFReq_misses::cpu.data       402753                       # number of SoftPFReq misses
system.cpu.dcache.SoftPFReq_misses::total       402753                       # number of SoftPFReq misses
system.cpu.dcache.demand_misses::cpu.data      1221886                       # number of demand (read+write) misses
system.cpu.dcache.demand_misses::total        1221886                       # number of demand (read+write) misses
system.cpu.dcache.overall_misses::cpu.data      1624639                       # number of overall misses
system.cpu.dcache.overall_misses::total       1624639                       # number of overall misses
system.cpu.dcache.ReadReq_accesses::cpu.data     12928678                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.ReadReq_accesses::total     12928678                       # number of ReadReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::cpu.data      8413437                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total      8413437                       # number of WriteReq accesses(hits+misses)
system.cpu.dcache.SoftPFReq_accesses::cpu.data       461657                       # number of SoftPFReq accesses(hits+misses)
system.cpu.dcache.SoftPFReq_accesses::total       461657                       # number of SoftPFReq accesses(hits+misses)
system.cpu.dcache.demand_accesses::cpu.data     21342115                       # number of demand (read+write) accesses
system.cpu.dcache.demand_accesses::total     21342115                       # number of demand (read+write) accesses
system.cpu.dcache.overall_accesses::cpu.data     21803772                       # number of overall (read+write) accesses
system.cpu.dcache.overall_accesses::total     21803772                       # number of overall (read+write) accesses
system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.070020                       # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total     0.070020                       # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.037632                       # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_miss_rate::total     0.037632                       # miss rate for WriteReq accesses
system.cpu.dcache.SoftPFReq_miss_rate::cpu.data     0.872407                       # miss rate for SoftPFReq accesses
system.cpu.dcache.SoftPFReq_miss_rate::total     0.872407                       # miss rate for SoftPFReq accesses
system.cpu.dcache.demand_miss_rate::cpu.data     0.057252                       # miss rate for demand accesses
system.cpu.dcache.demand_miss_rate::total     0.057252                       # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data     0.074512                       # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total     0.074512                       # miss rate for overall accesses
system.cpu.dcache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.dcache.writebacks::writebacks      1535790                       # number of writebacks
system.cpu.dcache.writebacks::total           1535790                       # number of writebacks
system.cpu.dtb_walker_cache.tags.replacements         7749                       # number of replacements
system.cpu.dtb_walker_cache.tags.tagsinuse     5.014001                       # Cycle average of tags in use
system.cpu.dtb_walker_cache.tags.total_refs        12936                       # Total number of references to valid blocks.
system.cpu.dtb_walker_cache.tags.sampled_refs         7763                       # Sample count of references to valid blocks.
system.cpu.dtb_walker_cache.tags.avg_refs     1.666366                       # Average number of references to valid blocks.
system.cpu.dtb_walker_cache.tags.warmup_cycle 5100450626500                       # Cycle when the warmup percentage was hit.
system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker     5.014001                       # Average occupied blocks per requestor
system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker     0.313375                       # Average percentage of cache occupancy
system.cpu.dtb_walker_cache.tags.occ_percent::total     0.313375                       # Average percentage of cache occupancy
system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024           14                       # Occupied blocks per task id
system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0            5                       # Occupied blocks per task id
system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1            5                       # Occupied blocks per task id
system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2            4                       # Occupied blocks per task id
system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024     0.875000                       # Percentage of cache occupancy per task id
system.cpu.dtb_walker_cache.tags.tag_accesses        52745                       # Number of tag accesses
system.cpu.dtb_walker_cache.tags.data_accesses        52745                       # Number of data accesses
system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker        12937                       # number of ReadReq hits
system.cpu.dtb_walker_cache.ReadReq_hits::total        12937                       # number of ReadReq hits
system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker        12937                       # number of demand (read+write) hits
system.cpu.dtb_walker_cache.demand_hits::total        12937                       # number of demand (read+write) hits
system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker        12937                       # number of overall hits
system.cpu.dtb_walker_cache.overall_hits::total        12937                       # number of overall hits
system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker         8957                       # number of ReadReq misses
system.cpu.dtb_walker_cache.ReadReq_misses::total         8957                       # number of ReadReq misses
system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker         8957                       # number of demand (read+write) misses
system.cpu.dtb_walker_cache.demand_misses::total         8957                       # number of demand (read+write) misses
system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker         8957                       # number of overall misses
system.cpu.dtb_walker_cache.overall_misses::total         8957                       # number of overall misses
system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker        21894                       # number of ReadReq accesses(hits+misses)
system.cpu.dtb_walker_cache.ReadReq_accesses::total        21894                       # number of ReadReq accesses(hits+misses)
system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker        21894                       # number of demand (read+write) accesses
system.cpu.dtb_walker_cache.demand_accesses::total        21894                       # number of demand (read+write) accesses
system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker        21894                       # number of overall (read+write) accesses
system.cpu.dtb_walker_cache.overall_accesses::total        21894                       # number of overall (read+write) accesses
system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker     0.409108                       # miss rate for ReadReq accesses
system.cpu.dtb_walker_cache.ReadReq_miss_rate::total     0.409108                       # miss rate for ReadReq accesses
system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker     0.409108                       # miss rate for demand accesses
system.cpu.dtb_walker_cache.demand_miss_rate::total     0.409108                       # miss rate for demand accesses
system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker     0.409108                       # miss rate for overall accesses
system.cpu.dtb_walker_cache.overall_miss_rate::total     0.409108                       # miss rate for overall accesses
system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dtb_walker_cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.dtb_walker_cache.blocked::no_mshrs            0                       # number of cycles access was blocked
system.cpu.dtb_walker_cache.blocked::no_targets            0                       # number of cycles access was blocked
system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.dtb_walker_cache.writebacks::writebacks         2897                       # number of writebacks
system.cpu.dtb_walker_cache.writebacks::total         2897                       # number of writebacks
system.cpu.icache.tags.replacements            792340                       # number of replacements
system.cpu.icache.tags.tagsinuse           510.662956                       # Cycle average of tags in use
system.cpu.icache.tags.total_refs           243675443                       # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs            792852                       # Sample count of references to valid blocks.
system.cpu.icache.tags.avg_refs            307.340390                       # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle      148913118500                       # Cycle when the warmup percentage was hit.
system.cpu.icache.tags.occ_blocks::cpu.inst   510.662956                       # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst     0.997389                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total     0.997389                       # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::0           90                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::1          130                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::2          291                       # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::3            1                       # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses         245261161                       # Number of tag accesses
system.cpu.icache.tags.data_accesses        245261161                       # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst    243675443                       # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total       243675443                       # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst     243675443                       # number of demand (read+write) hits
system.cpu.icache.demand_hits::total        243675443                       # number of demand (read+write) hits
system.cpu.icache.overall_hits::cpu.inst    243675443                       # number of overall hits
system.cpu.icache.overall_hits::total       243675443                       # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst       792859                       # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total        792859                       # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst       792859                       # number of demand (read+write) misses
system.cpu.icache.demand_misses::total         792859                       # number of demand (read+write) misses
system.cpu.icache.overall_misses::cpu.inst       792859                       # number of overall misses
system.cpu.icache.overall_misses::total        792859                       # number of overall misses
system.cpu.icache.ReadReq_accesses::cpu.inst    244468302                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_accesses::total    244468302                       # number of ReadReq accesses(hits+misses)
system.cpu.icache.demand_accesses::cpu.inst    244468302                       # number of demand (read+write) accesses
system.cpu.icache.demand_accesses::total    244468302                       # number of demand (read+write) accesses
system.cpu.icache.overall_accesses::cpu.inst    244468302                       # number of overall (read+write) accesses
system.cpu.icache.overall_accesses::total    244468302                       # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.003243                       # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total     0.003243                       # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst     0.003243                       # miss rate for demand accesses
system.cpu.icache.demand_miss_rate::total     0.003243                       # miss rate for demand accesses
system.cpu.icache.overall_miss_rate::cpu.inst     0.003243                       # miss rate for overall accesses
system.cpu.icache.overall_miss_rate::total     0.003243                       # miss rate for overall accesses
system.cpu.icache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.icache.writebacks::writebacks       792340                       # number of writebacks
system.cpu.icache.writebacks::total            792340                       # number of writebacks
system.cpu.itb_walker_cache.tags.replacements         3586                       # number of replacements
system.cpu.itb_walker_cache.tags.tagsinuse     3.026555                       # Cycle average of tags in use
system.cpu.itb_walker_cache.tags.total_refs         7763                       # Total number of references to valid blocks.
system.cpu.itb_walker_cache.tags.sampled_refs         3597                       # Sample count of references to valid blocks.
system.cpu.itb_walker_cache.tags.avg_refs     2.158187                       # Average number of references to valid blocks.
system.cpu.itb_walker_cache.tags.warmup_cycle 5102137159500                       # Cycle when the warmup percentage was hit.
system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker     3.026555                       # Average occupied blocks per requestor
system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker     0.189160                       # Average percentage of cache occupancy
system.cpu.itb_walker_cache.tags.occ_percent::total     0.189160                       # Average percentage of cache occupancy
system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024           11                       # Occupied blocks per task id
system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0            6                       # Occupied blocks per task id
system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2            4                       # Occupied blocks per task id
system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::3            1                       # Occupied blocks per task id
system.cpu.itb_walker_cache.tags.occ_task_id_percent::1024     0.687500                       # Percentage of cache occupancy per task id
system.cpu.itb_walker_cache.tags.tag_accesses        28899                       # Number of tag accesses
system.cpu.itb_walker_cache.tags.data_accesses        28899                       # Number of data accesses
system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker         7765                       # number of ReadReq hits
system.cpu.itb_walker_cache.ReadReq_hits::total         7765                       # number of ReadReq hits
system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker            2                       # number of WriteReq hits
system.cpu.itb_walker_cache.WriteReq_hits::total            2                       # number of WriteReq hits
system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker         7767                       # number of demand (read+write) hits
system.cpu.itb_walker_cache.demand_hits::total         7767                       # number of demand (read+write) hits
system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker         7767                       # number of overall hits
system.cpu.itb_walker_cache.overall_hits::total         7767                       # number of overall hits
system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker         4455                       # number of ReadReq misses
system.cpu.itb_walker_cache.ReadReq_misses::total         4455                       # number of ReadReq misses
system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker         4455                       # number of demand (read+write) misses
system.cpu.itb_walker_cache.demand_misses::total         4455                       # number of demand (read+write) misses
system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker         4455                       # number of overall misses
system.cpu.itb_walker_cache.overall_misses::total         4455                       # number of overall misses
system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker        12220                       # number of ReadReq accesses(hits+misses)
system.cpu.itb_walker_cache.ReadReq_accesses::total        12220                       # number of ReadReq accesses(hits+misses)
system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker            2                       # number of WriteReq accesses(hits+misses)
system.cpu.itb_walker_cache.WriteReq_accesses::total            2                       # number of WriteReq accesses(hits+misses)
system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker        12222                       # number of demand (read+write) accesses
system.cpu.itb_walker_cache.demand_accesses::total        12222                       # number of demand (read+write) accesses
system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker        12222                       # number of overall (read+write) accesses
system.cpu.itb_walker_cache.overall_accesses::total        12222                       # number of overall (read+write) accesses
system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker     0.364566                       # miss rate for ReadReq accesses
system.cpu.itb_walker_cache.ReadReq_miss_rate::total     0.364566                       # miss rate for ReadReq accesses
system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker     0.364507                       # miss rate for demand accesses
system.cpu.itb_walker_cache.demand_miss_rate::total     0.364507                       # miss rate for demand accesses
system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker     0.364507                       # miss rate for overall accesses
system.cpu.itb_walker_cache.overall_miss_rate::total     0.364507                       # miss rate for overall accesses
system.cpu.itb_walker_cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.itb_walker_cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.itb_walker_cache.blocked::no_mshrs            0                       # number of cycles access was blocked
system.cpu.itb_walker_cache.blocked::no_targets            0                       # number of cycles access was blocked
system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.itb_walker_cache.writebacks::writebacks          700                       # number of writebacks
system.cpu.itb_walker_cache.writebacks::total          700                       # number of writebacks
system.cpu.l2cache.tags.replacements           106202                       # number of replacements
system.cpu.l2cache.tags.tagsinuse        64823.935074                       # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs            4340729                       # Total number of references to valid blocks.
system.cpu.l2cache.tags.sampled_refs           170162                       # Sample count of references to valid blocks.
system.cpu.l2cache.tags.avg_refs            25.509391                       # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle                0                       # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 51928.967732                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker     0.002478                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker     0.135114                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.inst  2458.317021                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_blocks::cpu.data 10436.512729                       # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks     0.792373                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker     0.000000                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.itb.walker     0.000002                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst     0.037511                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data     0.159249                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total     0.989135                       # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_task_id_blocks::1024        63960                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::0           57                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::1          233                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::2         3348                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::3        20880                       # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4        39442                       # Occupied blocks per task id
system.cpu.l2cache.tags.occ_task_id_percent::1024     0.975952                       # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses         39254568                       # Number of tag accesses
system.cpu.l2cache.tags.data_accesses        39254568                       # Number of data accesses
system.cpu.l2cache.WritebackDirty_hits::writebacks      1539387                       # number of WritebackDirty hits
system.cpu.l2cache.WritebackDirty_hits::total      1539387                       # number of WritebackDirty hits
system.cpu.l2cache.WritebackClean_hits::writebacks       792329                       # number of WritebackClean hits
system.cpu.l2cache.WritebackClean_hits::total       792329                       # number of WritebackClean hits
system.cpu.l2cache.UpgradeReq_hits::cpu.data          312                       # number of UpgradeReq hits
system.cpu.l2cache.UpgradeReq_hits::total          312                       # number of UpgradeReq hits
system.cpu.l2cache.ReadExReq_hits::cpu.data       179766                       # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total       179766                       # number of ReadExReq hits
system.cpu.l2cache.ReadCleanReq_hits::cpu.inst       779612                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadCleanReq_hits::total       779612                       # number of ReadCleanReq hits
system.cpu.l2cache.ReadSharedReq_hits::cpu.dtb.walker         6533                       # number of ReadSharedReq hits
system.cpu.l2cache.ReadSharedReq_hits::cpu.itb.walker         2871                       # number of ReadSharedReq hits
system.cpu.l2cache.ReadSharedReq_hits::cpu.data      1275070                       # number of ReadSharedReq hits
system.cpu.l2cache.ReadSharedReq_hits::total      1284474                       # number of ReadSharedReq hits
system.cpu.l2cache.demand_hits::cpu.dtb.walker         6533                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.itb.walker         2871                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.inst       779612                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::cpu.data      1454836                       # number of demand (read+write) hits
system.cpu.l2cache.demand_hits::total         2243852                       # number of demand (read+write) hits
system.cpu.l2cache.overall_hits::cpu.dtb.walker         6533                       # number of overall hits
system.cpu.l2cache.overall_hits::cpu.itb.walker         2871                       # number of overall hits
system.cpu.l2cache.overall_hits::cpu.inst       779612                       # number of overall hits
system.cpu.l2cache.overall_hits::cpu.data      1454836                       # number of overall hits
system.cpu.l2cache.overall_hits::total        2243852                       # number of overall hits
system.cpu.l2cache.UpgradeReq_misses::cpu.data         1349                       # number of UpgradeReq misses
system.cpu.l2cache.UpgradeReq_misses::total         1349                       # number of UpgradeReq misses
system.cpu.l2cache.ReadExReq_misses::cpu.data       134647                       # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total       134647                       # number of ReadExReq misses
system.cpu.l2cache.ReadCleanReq_misses::cpu.inst        13234                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadCleanReq_misses::total        13234                       # number of ReadCleanReq misses
system.cpu.l2cache.ReadSharedReq_misses::cpu.dtb.walker            1                       # number of ReadSharedReq misses
system.cpu.l2cache.ReadSharedReq_misses::cpu.itb.walker            5                       # number of ReadSharedReq misses
system.cpu.l2cache.ReadSharedReq_misses::cpu.data        32164                       # number of ReadSharedReq misses
system.cpu.l2cache.ReadSharedReq_misses::total        32170                       # number of ReadSharedReq misses
system.cpu.l2cache.demand_misses::cpu.dtb.walker            1                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.itb.walker            5                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.inst        13234                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::cpu.data       166811                       # number of demand (read+write) misses
system.cpu.l2cache.demand_misses::total        180051                       # number of demand (read+write) misses
system.cpu.l2cache.overall_misses::cpu.dtb.walker            1                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.itb.walker            5                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.inst        13234                       # number of overall misses
system.cpu.l2cache.overall_misses::cpu.data       166811                       # number of overall misses
system.cpu.l2cache.overall_misses::total       180051                       # number of overall misses
system.cpu.l2cache.WritebackDirty_accesses::writebacks      1539387                       # number of WritebackDirty accesses(hits+misses)
system.cpu.l2cache.WritebackDirty_accesses::total      1539387                       # number of WritebackDirty accesses(hits+misses)
system.cpu.l2cache.WritebackClean_accesses::writebacks       792329                       # number of WritebackClean accesses(hits+misses)
system.cpu.l2cache.WritebackClean_accesses::total       792329                       # number of WritebackClean accesses(hits+misses)
system.cpu.l2cache.UpgradeReq_accesses::cpu.data         1661                       # number of UpgradeReq accesses(hits+misses)
system.cpu.l2cache.UpgradeReq_accesses::total         1661                       # number of UpgradeReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data       314413                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::total       314413                       # number of ReadExReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst       792846                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadCleanReq_accesses::total       792846                       # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::cpu.dtb.walker         6534                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::cpu.itb.walker         2876                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::cpu.data      1307234                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.ReadSharedReq_accesses::total      1316644                       # number of ReadSharedReq accesses(hits+misses)
system.cpu.l2cache.demand_accesses::cpu.dtb.walker         6534                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.itb.walker         2876                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.inst       792846                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::cpu.data      1621647                       # number of demand (read+write) accesses
system.cpu.l2cache.demand_accesses::total      2423903                       # number of demand (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.dtb.walker         6534                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.itb.walker         2876                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.inst       792846                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::cpu.data      1621647                       # number of overall (read+write) accesses
system.cpu.l2cache.overall_accesses::total      2423903                       # number of overall (read+write) accesses
system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data     0.812161                       # miss rate for UpgradeReq accesses
system.cpu.l2cache.UpgradeReq_miss_rate::total     0.812161                       # miss rate for UpgradeReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.428249                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total     0.428249                       # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.016692                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.016692                       # miss rate for ReadCleanReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.dtb.walker     0.000153                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.itb.walker     0.001739                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.024605                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.024433                       # miss rate for ReadSharedReq accesses
system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker     0.000153                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.itb.walker     0.001739                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.inst     0.016692                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::cpu.data     0.102865                       # miss rate for demand accesses
system.cpu.l2cache.demand_miss_rate::total     0.074281                       # miss rate for demand accesses
system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker     0.000153                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.itb.walker     0.001739                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.inst     0.016692                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data     0.102865                       # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total     0.074281                       # miss rate for overall accesses
system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.cpu.l2cache.writebacks::writebacks        98175                       # number of writebacks
system.cpu.l2cache.writebacks::total            98175                       # number of writebacks
system.cpu.toL2Bus.snoop_filter.tot_requests      4856494                       # Total number of requests made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_requests      2425336                       # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_requests        11672                       # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.snoop_filter.tot_snoops         1230                       # Total number of snoops made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_snoops         1230                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.trans_dist::ReadReq       13857337                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadResp      15971629                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteReq         13943                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteResp        13943                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::WritebackDirty      1539387                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::WritebackClean       792340                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::CleanEvict        93857                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::UpgradeReq         2200                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::UpgradeResp         2200                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq       314418                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp       314418                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadCleanReq       792859                       # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadSharedReq      1321433                       # Transaction distribution
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side      2378058                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side     32613747                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side        12496                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side        25663                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total          35029964                       # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side    101452736                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side    227551417                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side       329920                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side       758656                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size::total          330092729                       # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops                      203468                       # Total snoops (count)
system.cpu.toL2Bus.snoop_fanout::samples     18930863                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean        0.001304                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev       0.042949                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0           18911304     99.90%     99.90% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1              14428      0.08%     99.97% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2               5131      0.03%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::3                  0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::4                  0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value            0                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value            2                       # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::total       18930863                       # Request fanout histogram
system.iobus.trans_dist::ReadReq             10012057                       # Transaction distribution
system.iobus.trans_dist::ReadResp            10012057                       # Transaction distribution
system.iobus.trans_dist::WriteReq               57724                       # Transaction distribution
system.iobus.trans_dist::WriteResp              57724                       # Transaction distribution
system.iobus.trans_dist::MessageReq              1696                       # Transaction distribution
system.iobus.trans_dist::MessageResp             1696                       # Transaction distribution
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio           44                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.dma1.pio            6                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide.pio        11180                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.keyboard.pio         1364                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic1.pio           86                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic2.pio           54                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pit.pio           30                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.speaker.pio     19999988                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.io_apic.pio         1098                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.i_dont_exist1.pio          170                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.behind_pci.pio            2                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.com_1.pio        27940                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_2.pio           12                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_3.pio           12                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_4.pio           12                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.fake_floppy.pio           10                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.pc.pci_host.pio         2308                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::total     20044316                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.pc.south_bridge.ide.dma::system.iocache.cpu_side        95246                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.pc.south_bridge.ide.dma::total        95246                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave         3392                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total         3392                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_count::total                20142954                       # Packet count per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.cmos.pio           22                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.dma1.pio            3                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide.pio         6738                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.keyboard.pio          682                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic1.pio           43                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic2.pio           27                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pit.pio           15                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.speaker.pio      9999994                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.io_apic.pio         2196                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.i_dont_exist1.pio           85                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.behind_pci.pio            1                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.com_1.pio        13970                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_2.pio            6                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_3.pio            6                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_4.pio            6                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.fake_floppy.pio            5                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.pc.pci_host.pio         4477                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::total     10028276                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.pc.south_bridge.ide.dma::system.iocache.cpu_side      3027768                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.pc.south_bridge.ide.dma::total      3027768                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave         6784                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total         6784                       # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size::total                 13062828                       # Cumulative packet size per connected master and slave (bytes)
system.iocache.tags.replacements                47568                       # number of replacements
system.iocache.tags.tagsinuse                0.042439                       # Cycle average of tags in use
system.iocache.tags.total_refs                      0                       # Total number of references to valid blocks.
system.iocache.tags.sampled_refs                47584                       # Sample count of references to valid blocks.
system.iocache.tags.avg_refs                        0                       # Average number of references to valid blocks.
system.iocache.tags.warmup_cycle         4994875253009                       # Cycle when the warmup percentage was hit.
system.iocache.tags.occ_blocks::pc.south_bridge.ide     0.042439                       # Average occupied blocks per requestor
system.iocache.tags.occ_percent::pc.south_bridge.ide     0.002652                       # Average percentage of cache occupancy
system.iocache.tags.occ_percent::total       0.002652                       # Average percentage of cache occupancy
system.iocache.tags.occ_task_id_blocks::1023           16                       # Occupied blocks per task id
system.iocache.tags.age_task_id_blocks_1023::2           16                       # Occupied blocks per task id
system.iocache.tags.occ_task_id_percent::1023            1                       # Percentage of cache occupancy per task id
system.iocache.tags.tag_accesses               428607                       # Number of tag accesses
system.iocache.tags.data_accesses              428607                       # Number of data accesses
system.iocache.ReadReq_misses::pc.south_bridge.ide          903                       # number of ReadReq misses
system.iocache.ReadReq_misses::total              903                       # number of ReadReq misses
system.iocache.WriteLineReq_misses::pc.south_bridge.ide        46720                       # number of WriteLineReq misses
system.iocache.WriteLineReq_misses::total        46720                       # number of WriteLineReq misses
system.iocache.demand_misses::pc.south_bridge.ide        47623                       # number of demand (read+write) misses
system.iocache.demand_misses::total             47623                       # number of demand (read+write) misses
system.iocache.overall_misses::pc.south_bridge.ide        47623                       # number of overall misses
system.iocache.overall_misses::total            47623                       # number of overall misses
system.iocache.ReadReq_accesses::pc.south_bridge.ide          903                       # number of ReadReq accesses(hits+misses)
system.iocache.ReadReq_accesses::total            903                       # number of ReadReq accesses(hits+misses)
system.iocache.WriteLineReq_accesses::pc.south_bridge.ide        46720                       # number of WriteLineReq accesses(hits+misses)
system.iocache.WriteLineReq_accesses::total        46720                       # number of WriteLineReq accesses(hits+misses)
system.iocache.demand_accesses::pc.south_bridge.ide        47623                       # number of demand (read+write) accesses
system.iocache.demand_accesses::total           47623                       # number of demand (read+write) accesses
system.iocache.overall_accesses::pc.south_bridge.ide        47623                       # number of overall (read+write) accesses
system.iocache.overall_accesses::total          47623                       # number of overall (read+write) accesses
system.iocache.ReadReq_miss_rate::pc.south_bridge.ide            1                       # miss rate for ReadReq accesses
system.iocache.ReadReq_miss_rate::total             1                       # miss rate for ReadReq accesses
system.iocache.WriteLineReq_miss_rate::pc.south_bridge.ide            1                       # miss rate for WriteLineReq accesses
system.iocache.WriteLineReq_miss_rate::total            1                       # miss rate for WriteLineReq accesses
system.iocache.demand_miss_rate::pc.south_bridge.ide            1                       # miss rate for demand accesses
system.iocache.demand_miss_rate::total              1                       # miss rate for demand accesses
system.iocache.overall_miss_rate::pc.south_bridge.ide            1                       # miss rate for overall accesses
system.iocache.overall_miss_rate::total             1                       # miss rate for overall accesses
system.iocache.blocked_cycles::no_mshrs             0                       # number of cycles access was blocked
system.iocache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
system.iocache.blocked::no_mshrs                    0                       # number of cycles access was blocked
system.iocache.blocked::no_targets                  0                       # number of cycles access was blocked
system.iocache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
system.iocache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
system.iocache.writebacks::writebacks           46667                       # number of writebacks
system.iocache.writebacks::total                46667                       # number of writebacks
system.membus.trans_dist::ReadReq            13857337                       # Transaction distribution
system.membus.trans_dist::ReadResp           13903644                       # Transaction distribution
system.membus.trans_dist::WriteReq              13943                       # Transaction distribution
system.membus.trans_dist::WriteResp             13943                       # Transaction distribution
system.membus.trans_dist::WritebackDirty       144842                       # Transaction distribution
system.membus.trans_dist::CleanEvict             8802                       # Transaction distribution
system.membus.trans_dist::UpgradeReq             2189                       # Transaction distribution
system.membus.trans_dist::UpgradeResp            1650                       # Transaction distribution
system.membus.trans_dist::ReadExReq            134346                       # Transaction distribution
system.membus.trans_dist::ReadExResp           134346                       # Transaction distribution
system.membus.trans_dist::ReadSharedReq         46307                       # Transaction distribution
system.membus.trans_dist::MessageReq             1696                       # Transaction distribution
system.membus.trans_dist::MessageResp            1696                       # Transaction distribution
system.membus.trans_dist::InvalidateReq         46720                       # Transaction distribution
system.membus.trans_dist::InvalidateResp        46720                       # Transaction distribution
system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave         3392                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.apicbridge.master::total         3392                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave     20044316                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio      7698244                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port       469415                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::total     28211975                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::system.physmem.port       142814                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::total       142814                       # Packet count per connected master and slave (bytes)
system.membus.pkt_count::total               28358181                       # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave         6784                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.apicbridge.master::total         6784                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave     10028276                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio     15396485                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port     17787200                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::total     43211961                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::system.physmem.port      3044480                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::total      3044480                       # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total                46263225                       # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops                                0                       # Total snoops (count)
system.membus.snoop_fanout::samples          14256182                       # Request fanout histogram
system.membus.snoop_fanout::mean             1.000119                       # Request fanout histogram
system.membus.snoop_fanout::stdev            0.010907                       # Request fanout histogram
system.membus.snoop_fanout::underflows              0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::0                       0      0.00%      0.00% # Request fanout histogram
system.membus.snoop_fanout::1                14254486     99.99%     99.99% # Request fanout histogram
system.membus.snoop_fanout::2                    1696      0.01%    100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows               0      0.00%    100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value               1                       # Request fanout histogram
system.membus.snoop_fanout::max_value               2                       # Request fanout histogram
system.membus.snoop_fanout::total            14256182                       # Request fanout histogram
system.pc.south_bridge.ide.disks0.dma_read_full_pages            0                       # Number of full page size DMA reads (not PRD).
system.pc.south_bridge.ide.disks0.dma_read_bytes        34816                       # Number of bytes transfered via DMA reads (not PRD).
system.pc.south_bridge.ide.disks0.dma_read_txs           32                       # Number of DMA read transactions (not PRD).
system.pc.south_bridge.ide.disks0.dma_write_full_pages          693                       # Number of full page size DMA writes.
system.pc.south_bridge.ide.disks0.dma_write_bytes      2985984                       # Number of bytes transfered via DMA writes.
system.pc.south_bridge.ide.disks0.dma_write_txs          812                       # Number of DMA write transactions.
system.pc.south_bridge.ide.disks1.dma_read_full_pages            0                       # Number of full page size DMA reads (not PRD).
system.pc.south_bridge.ide.disks1.dma_read_bytes            0                       # Number of bytes transfered via DMA reads (not PRD).
system.pc.south_bridge.ide.disks1.dma_read_txs            0                       # Number of DMA read transactions (not PRD).
system.pc.south_bridge.ide.disks1.dma_write_full_pages            1                       # Number of full page size DMA writes.
system.pc.south_bridge.ide.disks1.dma_write_bytes         4096                       # Number of bytes transfered via DMA writes.
system.pc.south_bridge.ide.disks1.dma_write_txs            1                       # Number of DMA write transactions.

---------- End Simulation Statistics   ----------