tree 757b4fb7225fe35d8739ad2950aaa51042a362f2
parent 676d5fe4e882c9d073964a72c619024306fd279a
author Jordi Vaquero <jordi.vaquero@metempsy.com> 1565099354 +0200
committer Jordi Vaquero <jordi.vaquero@metempsy.com> 1565188251 +0000

arch-arm: adding register control flags enabling LSE implementation

Added changes on arch-arm architecture to accept Atomic instructions
following ARM v8.1 documentation. That includes enabling atomic bit
in ID registers and add have_lse variable into arm system.

Change-Id: Ic28d3215d74ff129142fb51cb2fa217d3b1482de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19809
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>