tree 7284acb2b2321aef76417eee359c1c79f84bebff
parent 7bb690c1ee70b1c82b23eeb68dcda3dc6e5c97f7
author Peter Yuen <ppeetteerrsx@gmail.com> 1614329030 +0700
committer Andrea Mondelli <Andrea.Mondelli@huawei.com> 1615622789 +0000

arch-riscv: Fixed CPU switching and PLIC issue with MinorCPU

Added takeover methods for PMA Checker and RiscvTLB to ensure
that checkpoint restoration works. Also added logic in PLIC
to prevent posting interrupts to a CPU that has yet to complete
the current interrupt. PLIC's behaviour when a CPU claims another
interrupt before completion is also changed. Now PLIC will return
the uncompleted interrupt ID instead of return 0. This behaviour
is not documented in the specs but is designed this way to avoid
issues from CPU side (especially MinorCPU).

Change-Id: I68eaaf56d2c4d76cc1e0a1e2160f5abe184c2cd5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41933
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>