tree 2a6fc39778e534c827f048320fcb89a75e8f9dfb
parent b6ef760ebb39e813526ba7abc3e05d7f449c9e32
author Gabe Black <gabeblack@google.com> 1571201311 -0700
committer Gabe Black <gabeblack@google.com> 1571449795 +0000

cpu,arm: Push the stage 2 MMUs out of the CPU into the TLBs.

This regularizes the TLB setup in the CPU so that ARM is no longer a
special case with extra objects.

Change-Id: I739b82578ff74f8f9777cd7e34cd5227b47b186c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21842
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>