ad107116a1d01aca2535e4c2f191278249177083 - public/gem5

commit	ad107116a1d01aca2535e4c2f191278249177083	[log] [tgz]
author	Roger Chang <rogerycchang@google.com>	Mon Nov 28 08:28:12 2022 +0000
committer	Roger Chang <rogerycchang@google.com>	Tue Dec 13 05:21:27 2022 +0000
tree	e1ac8dc04cc7265b3e96fb6749b3782b6ba618a3
parent	dd04e7044503046d19b89361edd9a48e14e66ab8 [diff]

arch-riscv: Support RV32 to remote gdb

support rv32 cpu, fpu, csr registers to remote gdb.

Change-Id: Ib821a35ff2e95f6f47569b1f4cb35cd98fcca77d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66131
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>

src/arch/riscv/gdb-xml/SConscript[diff]
src/arch/riscv/gdb-xml/riscv-32bit-cpu.xml[Added - diff]
src/arch/riscv/gdb-xml/riscv-32bit-csr.xml[Added - diff]
src/arch/riscv/gdb-xml/riscv-32bit-fpu.xml[Added - diff]
src/arch/riscv/gdb-xml/riscv-32bit.xml[Added - diff]
src/arch/riscv/remote_gdb.cc[diff]
src/arch/riscv/remote_gdb.hh[diff]

7 files changed