# Copyright (c) 2009 Advanced Micro Devices, Inc.
# All rights reserved.
#
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# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
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# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
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from m5.params import *
from m5.proxy import *
from m5.objects.ReplacementPolicies import *
from m5.SimObject import SimObject

class RubyCache(SimObject):
    type = 'RubyCache'
    cxx_class = 'CacheMemory'
    cxx_header = "mem/ruby/structures/CacheMemory.hh"
    size = Param.MemorySize("capacity in bytes");
    assoc = Param.Int("");
    replacement_policy = Param.BaseReplacementPolicy(TreePLRURP(), "")
    start_index_bit = Param.Int(6, "index start, default 6 for 64-byte line");
    is_icache = Param.Bool(False, "is instruction only cache");
    block_size = Param.MemorySize("0B", "block size in bytes. 0 means default RubyBlockSize")

    dataArrayBanks = Param.Int(1, "Number of banks for the data array")
    tagArrayBanks = Param.Int(1, "Number of banks for the tag array")
    dataAccessLatency = Param.Cycles(1, "cycles for a data array access")
    tagAccessLatency = Param.Cycles(1, "cycles for a tag array access")
    resourceStalls = Param.Bool(False, "stall if there is a resource failure")
    ruby_system = Param.RubySystem(Parent.any, "")