| commit | b3eb2db7e44526bcbd0e5a1f382253c72ab5cb78 | [log] [tgz] |
|---|---|---|
| author | Gabe Black <gabeblack@google.com> | Mon Nov 25 17:01:56 2019 -0800 |
| committer | Gabe Black <gabeblack@google.com> | Fri Feb 07 10:57:54 2020 +0000 |
| tree | 209a59afd69b71fdc314328fd4c211d124e5d733 | |
| parent | 549e0b25e3b370e141e38f973e73adb75783fc34 [diff] |
x86: Handle m5 op accesses directly in the mmapped IPR handlers. The common handlers only handle the m5ops, and it takes more plumbing to get to them than to just handle the m5ops directly from x86. Also, centralizing the call to PseudoInst::pseudoInst prevents specializing the ABI per-ISA. Jira Issue: https://gem5.atlassian.net/browse/GEM5-187 Change-Id: Ife9cf0d61ac87605ddc9cf9c84feebb8b23cc33a Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23184 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>