commit b8a4c876905d605cf180e77f7d1bb08f2ed22940
author Tiago Muck <tiago.muck@arm.com> Wed Dec 12 15:52:41 2018 -0600
committer Tiago Mück <tiago.muck@arm.com> Wed May 22 19:43:36 2019 +0000
tree dd19be708a9e321230ab17b28bf27fcb20c66f49
parent c022369490ec94e332f6a09826ef3fc6ad063ca2

mem: Add invalid context id check on LLSC checks

If the request's address is in the LLSC list, its context Id was being
fetched unconditionally, which could cause the assert at
Request::contextId() to fail.

Change-Id: Iae9791f81c8fe9a7fcd842cd8ab7db18f34f2808
Signed-off-by: Tiago Muck <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18792
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/mem/abstract_mem.cc

diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index a998530..6870ba3 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2012,2017-2018 ARM Limited
+ * Copyright (c) 2010-2012,2017-2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -284,7 +284,10 @@
                 DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
                         i->contextId, paddr);
                 ContextID owner_cid = i->contextId;
-                ContextID requester_cid = pkt->req->contextId();
+                assert(owner_cid != InvalidContextID);
+                ContextID requester_cid = req->hasContextId() ?
+                                           req->contextId() :
+                                           InvalidContextID;
                 if (owner_cid != requester_cid) {
                     ThreadContext* ctx = system()->getThreadContext(owner_cid);
                     TheISA::globalClearExclusive(ctx);

src/mem/abstract_mem.hh

diff --git a/src/mem/abstract_mem.hh b/src/mem/abstract_mem.hh
index 18d8ee9..8b944b9 100644
--- a/src/mem/abstract_mem.hh
+++ b/src/mem/abstract_mem.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012 ARM Limited
+ * Copyright (c) 2012, 2019 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -83,6 +83,8 @@
     // check for matching execution context
     bool matchesContext(const RequestPtr &req) const
     {
+        assert(contextId != InvalidContextID);
+        assert(req->hasContextId());
         return (contextId == req->contextId());
     }