diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 85d00a9..01a0b7f 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -143,9 +143,6 @@
     /** Returns the name of the DefaultCommit. */
     std::string name() const;
 
-    /** Registers statistics. */
-    void regStats();
-
     /** Registers probes. */
     void regProbePoints();
 
@@ -479,52 +476,55 @@
     /** Updates commit stats based on this instruction. */
     void updateComInstStats(const DynInstPtr &inst);
 
-
     // HTM
     int htmStarts[Impl::MaxThreads];
     int htmStops[Impl::MaxThreads];
 
-    /** Stat for the total number of squashed instructions discarded by commit.
-     */
-    Stats::Scalar commitSquashedInsts;
-    /** Stat for the total number of times commit has had to stall due to a non-
-     * speculative instruction reaching the head of the ROB.
-     */
-    Stats::Scalar commitNonSpecStalls;
-    /** Stat for the total number of branch mispredicts that caused a squash. */
-    Stats::Scalar branchMispredicts;
-    /** Distribution of the number of committed instructions each cycle. */
-    Stats::Distribution numCommittedDist;
+    struct CommitStats : public Stats::Group {
+        CommitStats(O3CPU *cpu, DefaultCommit *commit);
+        /** Stat for the total number of squashed instructions discarded by
+         * commit.
+         */
+        Stats::Scalar commitSquashedInsts;
+        /** Stat for the total number of times commit has had to stall due
+         * to a non-speculative instruction reaching the head of the ROB.
+         */
+        Stats::Scalar commitNonSpecStalls;
+        /** Stat for the total number of branch mispredicts that caused a
+         * squash.
+         */
+        Stats::Scalar branchMispredicts;
+        /** Distribution of the number of committed instructions each cycle. */
+        Stats::Distribution numCommittedDist;
 
-    /** Total number of instructions committed. */
-    Stats::Vector instsCommitted;
-    /** Total number of ops (including micro ops) committed. */
-    Stats::Vector opsCommitted;
-    /** Total number of software prefetches committed. */
-    Stats::Vector statComSwp;
-    /** Stat for the total number of committed memory references. */
-    Stats::Vector statComRefs;
-    /** Stat for the total number of committed loads. */
-    Stats::Vector statComLoads;
-    /** Stat for the total number of committed atomics. */
-    Stats::Vector statComAmos;
-    /** Total number of committed memory barriers. */
-    Stats::Vector statComMembars;
-    /** Total number of committed branches. */
-    Stats::Vector statComBranches;
-    /** Total number of vector instructions */
-    Stats::Vector statComVector;
-    /** Total number of floating point instructions */
-    Stats::Vector statComFloating;
-    /** Total number of integer instructions */
-    Stats::Vector statComInteger;
-    /** Total number of function calls */
-    Stats::Vector statComFunctionCalls;
-    /** Committed instructions by instruction type (OpClass) */
-    Stats::Vector2d statCommittedInstType;
+        /** Total number of instructions committed. */
+        Stats::Vector instsCommitted;
+        /** Total number of ops (including micro ops) committed. */
+        Stats::Vector opsCommitted;
+        /** Stat for the total number of committed memory references. */
+        Stats::Vector memRefs;
+        /** Stat for the total number of committed loads. */
+        Stats::Vector loads;
+        /** Stat for the total number of committed atomics. */
+        Stats::Vector amos;
+        /** Total number of committed memory barriers. */
+        Stats::Vector membars;
+        /** Total number of committed branches. */
+        Stats::Vector branches;
+        /** Total number of vector instructions */
+        Stats::Vector vector;
+        /** Total number of floating point instructions */
+        Stats::Vector floating;
+        /** Total number of integer instructions */
+        Stats::Vector integer;
+        /** Total number of function calls */
+        Stats::Vector functionCalls;
+        /** Committed instructions by instruction type (OpClass) */
+        Stats::Vector2d committedInstType;
 
-    /** Number of cycles where the commit bandwidth limit is reached. */
-    Stats::Scalar commitEligibleSamples;
+        /** Number of cycles where the commit bandwidth limit is reached. */
+        Stats::Scalar commitEligibleSamples;
+    } stats;
 };
 
 #endif // __CPU_O3_COMMIT_HH__
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 73041ba..fd9146b 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -92,7 +92,8 @@
       drainImminent(false),
       trapLatency(params->trapLatency),
       canHandleInterrupts(true),
-      avoidQuiesceLiveLock(false)
+      avoidQuiesceLiveLock(false),
+      stats(_cpu, this)
 {
     if (commitWidth > Impl::MaxWidth)
         fatal("commitWidth (%d) is larger than compiled limit (%d),\n"
@@ -145,129 +146,91 @@
 }
 
 template <class Impl>
-void
-DefaultCommit<Impl>::regStats()
+DefaultCommit<Impl>::CommitStats::CommitStats(O3CPU *cpu,
+                                              DefaultCommit *commit)
+    : Stats::Group(cpu, "commit"),
+      ADD_STAT(commitSquashedInsts, "The number of squashed insts skipped by"
+          " commit"),
+      ADD_STAT(commitNonSpecStalls, "The number of times commit has been"
+          " forced to stall to communicate backwards"),
+      ADD_STAT(branchMispredicts, "The number of times a branch was"
+          " mispredicted"),
+      ADD_STAT(numCommittedDist, "Number of insts commited each cycle"),
+      ADD_STAT(instsCommitted, "Number of instructions committed"),
+      ADD_STAT(opsCommitted, "Number of ops (including micro ops) committed"),
+      ADD_STAT(memRefs, "Number of memory references committed"),
+      ADD_STAT(loads, "Number of loads committed"),
+      ADD_STAT(amos, "Number of atomic instructions committed"),
+      ADD_STAT(membars, "Number of memory barriers committed"),
+      ADD_STAT(branches, "Number of branches committed"),
+      ADD_STAT(vector, "Number of committed Vector instructions."),
+      ADD_STAT(floating, "Number of committed floating point"
+          " instructions."),
+      ADD_STAT(integer, "Number of committed integer instructions."),
+      ADD_STAT(functionCalls, "Number of function calls committed."),
+      ADD_STAT(committedInstType, "Class of committed instruction"),
+      ADD_STAT(commitEligibleSamples, "number cycles where commit BW limit"
+          " reached")
 {
     using namespace Stats;
-    commitSquashedInsts
-        .name(name() + ".commitSquashedInsts")
-        .desc("The number of squashed insts skipped by commit")
-        .prereq(commitSquashedInsts);
 
-    commitNonSpecStalls
-        .name(name() + ".commitNonSpecStalls")
-        .desc("The number of times commit has been forced to stall to "
-              "communicate backwards")
-        .prereq(commitNonSpecStalls);
-
-    branchMispredicts
-        .name(name() + ".branchMispredicts")
-        .desc("The number of times a branch was mispredicted")
-        .prereq(branchMispredicts);
+    commitSquashedInsts.prereq(commitSquashedInsts);
+    commitNonSpecStalls.prereq(commitNonSpecStalls);
+    branchMispredicts.prereq(branchMispredicts);
 
     numCommittedDist
-        .init(0,commitWidth,1)
-        .name(name() + ".committed_per_cycle")
-        .desc("Number of insts commited each cycle")
-        .flags(Stats::pdf)
-        ;
+        .init(0,commit->commitWidth,1)
+        .flags(Stats::pdf);
 
     instsCommitted
         .init(cpu->numThreads)
-        .name(name() + ".committedInsts")
-        .desc("Number of instructions committed")
-        .flags(total)
-        ;
+        .flags(total);
 
     opsCommitted
         .init(cpu->numThreads)
-        .name(name() + ".committedOps")
-        .desc("Number of ops (including micro ops) committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComSwp
+    memRefs
         .init(cpu->numThreads)
-        .name(name() + ".swp_count")
-        .desc("Number of s/w prefetches committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComRefs
+    loads
         .init(cpu->numThreads)
-        .name(name() +  ".refs")
-        .desc("Number of memory references committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComLoads
+    amos
         .init(cpu->numThreads)
-        .name(name() +  ".loads")
-        .desc("Number of loads committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComAmos
+    membars
         .init(cpu->numThreads)
-        .name(name() +  ".amos")
-        .desc("Number of atomic instructions committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComMembars
+    branches
         .init(cpu->numThreads)
-        .name(name() +  ".membars")
-        .desc("Number of memory barriers committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComBranches
+    vector
         .init(cpu->numThreads)
-        .name(name() + ".branches")
-        .desc("Number of branches committed")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComFloating
+    floating
         .init(cpu->numThreads)
-        .name(name() + ".fp_insts")
-        .desc("Number of committed floating point instructions.")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComVector
+    integer
         .init(cpu->numThreads)
-        .name(name() + ".vec_insts")
-        .desc("Number of committed Vector instructions.")
-        .flags(total)
-        ;
+        .flags(total);
 
-    statComInteger
-        .init(cpu->numThreads)
-        .name(name()+".int_insts")
-        .desc("Number of committed integer instructions.")
-        .flags(total)
-        ;
+    functionCalls
+        .init(commit->numThreads)
+        .flags(total);
 
-    statComFunctionCalls
-        .init(cpu->numThreads)
-        .name(name()+".function_calls")
-        .desc("Number of function calls committed.")
-        .flags(total)
-        ;
+    committedInstType
+        .init(commit->numThreads,Enums::Num_OpClass)
+        .flags(total | pdf | dist);
 
-    statCommittedInstType
-        .init(numThreads,Enums::Num_OpClass)
-        .name(name() + ".op_class")
-        .desc("Class of committed instruction")
-        .flags(total | pdf | dist)
-        ;
-    statCommittedInstType.ysubnames(Enums::OpClassStrings);
-
-    commitEligibleSamples
-        .name(name() + ".bw_lim_events")
-        .desc("number cycles where commit BW limit reached")
-        ;
+    committedInstType.ysubnames(Enums::OpClassStrings);
 }
 
 template <class Impl>
@@ -948,7 +911,7 @@
                 if (toIEW->commitInfo[tid].mispredictInst->isUncondCtrl()) {
                      toIEW->commitInfo[tid].branchTaken = true;
                 }
-                ++branchMispredicts;
+                ++stats.branchMispredicts;
             }
 
             toIEW->commitInfo[tid].pc = fromIEW->pc[tid];
@@ -1075,7 +1038,7 @@
 
             rob->retireHead(commit_thread);
 
-            ++commitSquashedInsts;
+            ++stats.commitSquashedInsts;
             // Notify potential listeners that this instruction is squashed
             ppSquash->notify(head_inst);
 
@@ -1096,7 +1059,7 @@
 
             if (commit_success) {
                 ++num_committed;
-                statCommittedInstType[tid][head_inst->opClass()]++;
+                stats.committedInstType[tid][head_inst->opClass()]++;
                 ppCommit->notify(head_inst);
 
                 // hardware transactional memory
@@ -1208,10 +1171,10 @@
     }
 
     DPRINTF(CommitRate, "%i\n", num_committed);
-    numCommittedDist.sample(num_committed);
+    stats.numCommittedDist.sample(num_committed);
 
     if (num_committed == commitWidth) {
-        commitEligibleSamples++;
+        stats.commitEligibleSamples++;
     }
 }
 
@@ -1264,7 +1227,7 @@
             toIEW->commitInfo[tid].strictlyOrdered = true;
             toIEW->commitInfo[tid].strictlyOrderedLoad = head_inst;
         } else {
-            ++commitNonSpecStalls;
+            ++stats.commitNonSpecStalls;
         }
 
         return false;
@@ -1474,8 +1437,8 @@
     ThreadID tid = inst->threadNumber;
 
     if (!inst->isMicroop() || inst->isLastMicroop())
-        instsCommitted[tid]++;
-    opsCommitted[tid]++;
+        stats.instsCommitted[tid]++;
+    stats.opsCommitted[tid]++;
 
     // To match the old model, don't count nops and instruction
     // prefetches towards the total commit count.
@@ -1487,41 +1450,41 @@
     //  Control Instructions
     //
     if (inst->isControl())
-        statComBranches[tid]++;
+        stats.branches[tid]++;
 
     //
     //  Memory references
     //
     if (inst->isMemRef()) {
-        statComRefs[tid]++;
+        stats.memRefs[tid]++;
 
         if (inst->isLoad()) {
-            statComLoads[tid]++;
+            stats.loads[tid]++;
         }
 
         if (inst->isAtomic()) {
-            statComAmos[tid]++;
+            stats.amos[tid]++;
         }
     }
 
     if (inst->isMemBarrier()) {
-        statComMembars[tid]++;
+        stats.membars[tid]++;
     }
 
     // Integer Instruction
     if (inst->isInteger())
-        statComInteger[tid]++;
+        stats.integer[tid]++;
 
     // Floating Point Instruction
     if (inst->isFloating())
-        statComFloating[tid]++;
+        stats.floating[tid]++;
     // Vector Instruction
     if (inst->isVector())
-        statComVector[tid]++;
+        stats.vector[tid]++;
 
     // Function Calls
     if (inst->isCall())
-        statComFunctionCalls[tid]++;
+        stats.functionCalls[tid]++;
 
 }
 
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index ed69b1a..c705801 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -444,7 +444,6 @@
     this->decode.regStats();
     this->rename.regStats();
     this->iew.regStats();
-    this->commit.regStats();
     this->rob.regStats();
 
     intRegfileReads