commit d00aa3658498968f7dc2b586347771734af0d24a
author Nikos Nikoleris <nikos.nikoleris@arm.com> Thu Jun 13 16:01:02 2019 +0100
committer Nikos Nikoleris <nikos.nikoleris@arm.com> Mon Jun 17 09:50:18 2019 +0000
tree 48653635bc988110388ae146c97b7d2188ee4dbd
parent 8e3164a90b50a18fb2906a18f353189902fce26e

python: Fix AddrRange legacy ParamValue wrapper

This change fixes a bug that would manifest if a user would
instantiate an AddrRange ParamValue using the kwargs 'intlvBits' and
'intlvHighBit' without specifying the optional 'xorHighBit'.

Change-Id: I2091c432234df9cf907d52af6ba7f0cadd8c37a8
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19248
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/python/m5/params.py

diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index da1304d..b9afff2 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -757,8 +757,6 @@
 
     def __init__(self, *args, **kwargs):
         # Disable interleaving and hashing by default
-        self.intlvHighBit = 0
-        self.xorHighBit = 0
         self.intlvBits = 0
         self.intlvMatch = 0
         self.masks = []
@@ -782,20 +780,22 @@
                 self.masks = [ long(x) for x in list(kwargs.pop('masks')) ]
                 self.intlvBits = len(self.masks)
             else:
-                if 'intlvHighBit' in kwargs:
-                    intlv_high_bit = int(kwargs.pop('intlvHighBit'))
-                if 'xorHighBit' in kwargs:
-                    xor_high_bit = int(kwargs.pop('xorHighBit'))
                 if 'intlvBits' in kwargs:
                     self.intlvBits = int(kwargs.pop('intlvBits'))
                     self.masks = [0] * self.intlvBits
-                for i in range(0, self.intlvBits):
-                    bit1 = intlv_high_bit - i
-                    mask = 1 << bit1
-                    if xor_high_bit != 0:
-                        bit2 = xor_high_bit - i
-                        mask |= 1 << bit2
-                    self.masks[self.intlvBits - i - 1] = mask
+                    if 'intlvHighBit' not in kwargs:
+                        raise TypeError("No interleave bits specified")
+                    intlv_high_bit = int(kwargs.pop('intlvHighBit'))
+                    xor_high_bit = 0
+                    if 'xorHighBit' in kwargs:
+                        xor_high_bit = int(kwargs.pop('xorHighBit'))
+                    for i in range(0, self.intlvBits):
+                        bit1 = intlv_high_bit - i
+                        mask = 1 << bit1
+                        if xor_high_bit != 0:
+                            bit2 = xor_high_bit - i
+                            mask |= 1 << bit2
+                        self.masks[self.intlvBits - i - 1] = mask
 
         if len(args) == 0:
             self.start = Addr(kwargs.pop('start'))