commit d3d24835bcc03ecf312ac6ba7df114656770730f
author Gabe Black <gabeblack@google.com> Thu Mar 07 03:02:35 2019 -0800
committer Gabe Black <gabeblack@google.com> Tue Mar 19 10:22:50 2019 +0000
tree 43bb564a7bc3e22ffd7b1b906f6f96742ecb619a
parent 378d9ccbeb4053aeeab002159b26625854af54f7

arch, cpu, dev, gpu, mem, sim, python: start using getPort.

Replace the getMasterPort, getSlavePort, and getEthPort functions
with getPort, and remove extraneous mechanisms that are no longer
necessary.

Change-Id: Iab7e3c02d2f3a0cf33e7e824e18c28646b5bc318
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17040
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/mem/mem_delay.hh

diff --git a/src/mem/mem_delay.hh b/src/mem/mem_delay.hh
index 7ecb656..789d965 100644
--- a/src/mem/mem_delay.hh
+++ b/src/mem/mem_delay.hh
@@ -69,12 +69,9 @@
 
     void init() override;
 
-  protected: // Port interfaces
-    BaseMasterPort& getMasterPort(const std::string &if_name,
-                                          PortID idx = InvalidPortID) override;
-
-    BaseSlavePort& getSlavePort(const std::string &if_name,
-                                PortID idx = InvalidPortID) override;
+  protected: // Port interface
+    Port &getPort(const std::string &if_name,
+                  PortID idx=InvalidPortID) override;
 
     class MasterPort : public QueuedMasterPort
     {