84ae0afa5981aa128242797612e0298356e29f77 - public/gem5

commit	84ae0afa5981aa128242797612e0298356e29f77	[log] [tgz]
author	Gabe Black <gabe.black@gmail.com>	Tue Aug 24 00:39:26 2021 -0700
committer	Gabe Black <gabe.black@gmail.com>	Wed Jun 08 07:09:05 2022 +0000
tree	d73b9847305ed914e8ba2329f379c86c873da049
parent	c4ea43f4626d07d22a33dc6ef0af8af7eda9136b [diff]

arch-x86: Put misc reg indexes into a name space.

Also make them match the style guide.

Change-Id: I845f141f85d4499a5acf56c2161240764906a232
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49758
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>

src/arch/amdgpu/common/tlb.cc[diff]
src/arch/x86/faults.cc[diff]
src/arch/x86/fs_workload.cc[diff]
src/arch/x86/interrupts.cc[diff]
src/arch/x86/isa.cc[diff]
src/arch/x86/isa.hh[diff]
src/arch/x86/isa/decoder/two_byte_opcodes.isa[diff]
src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_control_and_status.py[diff]
src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_state.py[diff]
src/arch/x86/isa/insts/system/msrs.py[diff]
src/arch/x86/isa/insts/x87/control/save_and_restore_x87_environment.py[diff]
src/arch/x86/isa/microasm.isa[diff]
src/arch/x86/isa/microops/regop.isa[diff]
src/arch/x86/isa/operands.isa[diff]
src/arch/x86/kvm/x86_cpu.cc[diff]
src/arch/x86/linux/linux.hh[diff]
src/arch/x86/linux/se_workload.cc[diff]
src/arch/x86/linux/syscalls.cc[diff]
src/arch/x86/pagetable_walker.cc[diff]
src/arch/x86/process.cc[diff]
src/arch/x86/regs/misc.hh[diff]
src/arch/x86/regs/msr.cc[diff]
src/arch/x86/regs/msr.hh[diff]
src/arch/x86/remote_gdb.cc[diff]
src/arch/x86/tlb.cc[diff]
src/arch/x86/utility.cc[diff]
src/arch/x86/utility.hh[diff]

27 files changed

tree: d73b9847305ed914e8ba2329f379c86c873da049