{
    "name": null, 
    "sim_quantum": 0, 
    "system": {
        "kernel": "", 
        "mmap_using_noreserve": false, 
        "kernel_addr_check": true, 
        "membus": {
            "point_of_coherency": true, 
            "system": "system", 
            "response_latency": 2, 
            "cxx_class": "CoherentXBar", 
            "forward_latency": 4, 
            "clk_domain": "system.clk_domain", 
            "width": 16, 
            "eventq_index": 0, 
            "default_p_state": "UNDEFINED", 
            "p_state_clk_gate_max": 1000000000000, 
            "master": {
                "peer": [
                    "system.physmem.port"
                ], 
                "role": "MASTER"
            }, 
            "type": "CoherentXBar", 
            "frontend_latency": 3, 
            "slave": {
                "peer": [
                    "system.system_port", 
                    "system.cpu.l2cache.mem_side"
                ], 
                "role": "SLAVE"
            }, 
            "p_state_clk_gate_min": 1000, 
            "snoop_filter": {
                "name": "snoop_filter", 
                "system": "system", 
                "max_capacity": 8388608, 
                "eventq_index": 0, 
                "cxx_class": "SnoopFilter", 
                "path": "system.membus.snoop_filter", 
                "type": "SnoopFilter", 
                "lookup_latency": 1
            }, 
            "power_model": null, 
            "path": "system.membus", 
            "snoop_response_latency": 4, 
            "name": "membus", 
            "p_state_clk_gate_bins": 20, 
            "use_default_range": false
        }, 
        "symbolfile": "", 
        "readfile": "", 
        "thermal_model": null, 
        "cxx_class": "System", 
        "work_begin_cpu_id_exit": -1, 
        "load_offset": 0, 
        "work_begin_exit_count": 0, 
        "p_state_clk_gate_min": 1000, 
        "memories": [
            "system.physmem"
        ], 
        "work_begin_ckpt_count": 0, 
        "clk_domain": {
            "name": "clk_domain", 
            "clock": [
                1000
            ], 
            "init_perf_level": 0, 
            "voltage_domain": "system.voltage_domain", 
            "eventq_index": 0, 
            "cxx_class": "SrcClockDomain", 
            "path": "system.clk_domain", 
            "type": "SrcClockDomain", 
            "domain_id": -1
        }, 
        "mem_ranges": [], 
        "eventq_index": 0, 
        "default_p_state": "UNDEFINED", 
        "p_state_clk_gate_max": 1000000000000, 
        "dvfs_handler": {
            "enable": false, 
            "name": "dvfs_handler", 
            "sys_clk_domain": "system.clk_domain", 
            "transition_latency": 100000000, 
            "eventq_index": 0, 
            "cxx_class": "DVFSHandler", 
            "domains": [], 
            "path": "system.dvfs_handler", 
            "type": "DVFSHandler"
        }, 
        "work_end_exit_count": 0, 
        "type": "System", 
        "voltage_domain": {
            "name": "voltage_domain", 
            "eventq_index": 0, 
            "voltage": [
                "1.0"
            ], 
            "cxx_class": "VoltageDomain", 
            "path": "system.voltage_domain", 
            "type": "VoltageDomain"
        }, 
        "cache_line_size": 64, 
        "boot_osflags": "a", 
        "system_port": {
            "peer": "system.membus.slave[0]", 
            "role": "MASTER"
        }, 
        "physmem": {
            "range": "0:134217727:0:0:0:0", 
            "latency": 30000, 
            "name": "physmem", 
            "p_state_clk_gate_min": 1000, 
            "eventq_index": 0, 
            "p_state_clk_gate_bins": 20, 
            "default_p_state": "UNDEFINED", 
            "kvm_map": true, 
            "clk_domain": "system.clk_domain", 
            "power_model": null, 
            "latency_var": 0, 
            "bandwidth": "73.000000", 
            "conf_table_reported": true, 
            "cxx_class": "SimpleMemory", 
            "p_state_clk_gate_max": 1000000000000, 
            "path": "system.physmem", 
            "null": false, 
            "type": "SimpleMemory", 
            "port": {
                "peer": "system.membus.master[0]", 
                "role": "SLAVE"
            }, 
            "in_addr_map": true
        }, 
        "power_model": null, 
        "work_cpus_ckpt_count": 0, 
        "thermal_components": [], 
        "path": "system", 
        "cpu_clk_domain": {
            "name": "cpu_clk_domain", 
            "clock": [
                500
            ], 
            "init_perf_level": 0, 
            "voltage_domain": "system.voltage_domain", 
            "eventq_index": 0, 
            "cxx_class": "SrcClockDomain", 
            "path": "system.cpu_clk_domain", 
            "type": "SrcClockDomain", 
            "domain_id": -1
        }, 
        "work_end_ckpt_count": 0, 
        "mem_mode": "timing", 
        "name": "system", 
        "init_param": 0, 
        "p_state_clk_gate_bins": 20, 
        "load_addr_mask": 1099511627775, 
        "cpu": [
            {
                "do_statistics_insts": true, 
                "numThreads": 1, 
                "itb": {
                    "name": "itb", 
                    "eventq_index": 0, 
                    "cxx_class": "RiscvISA::TLB", 
                    "path": "system.cpu.itb", 
                    "type": "RiscvTLB", 
                    "size": 64
                }, 
                "system": "system", 
                "icache": {
                    "cpu_side": {
                        "peer": "system.cpu.icache_port", 
                        "role": "SLAVE"
                    }, 
                    "clusivity": "mostly_incl", 
                    "prefetcher": null, 
                    "system": "system", 
                    "write_buffers": 8, 
                    "response_latency": 2, 
                    "cxx_class": "Cache", 
                    "size": 131072, 
                    "type": "Cache", 
                    "clk_domain": "system.cpu_clk_domain", 
                    "max_miss_count": 0, 
                    "eventq_index": 0, 
                    "default_p_state": "UNDEFINED", 
                    "p_state_clk_gate_max": 1000000000000, 
                    "mem_side": {
                        "peer": "system.cpu.toL2Bus.slave[0]", 
                        "role": "MASTER"
                    }, 
                    "mshrs": 4, 
                    "writeback_clean": true, 
                    "p_state_clk_gate_min": 1000, 
                    "tags": {
                        "size": 131072, 
                        "tag_latency": 2, 
                        "name": "tags", 
                        "p_state_clk_gate_min": 1000, 
                        "eventq_index": 0, 
                        "p_state_clk_gate_bins": 20, 
                        "default_p_state": "UNDEFINED", 
                        "clk_domain": "system.cpu_clk_domain", 
                        "power_model": null, 
                        "sequential_access": false, 
                        "assoc": 2, 
                        "cxx_class": "LRU", 
                        "p_state_clk_gate_max": 1000000000000, 
                        "path": "system.cpu.icache.tags", 
                        "block_size": 64, 
                        "type": "LRU", 
                        "data_latency": 2
                    }, 
                    "tgts_per_mshr": 20, 
                    "demand_mshr_reserve": 1, 
                    "power_model": null, 
                    "addr_ranges": [
                        "0:18446744073709551615:0:0:0:0"
                    ], 
                    "is_read_only": true, 
                    "prefetch_on_access": false, 
                    "path": "system.cpu.icache", 
                    "data_latency": 2, 
                    "tag_latency": 2, 
                    "name": "icache", 
                    "p_state_clk_gate_bins": 20, 
                    "sequential_access": false, 
                    "assoc": 2
                }, 
                "function_trace": false, 
                "do_checkpoint_insts": true, 
                "cxx_class": "TimingSimpleCPU", 
                "max_loads_all_threads": 0, 
                "clk_domain": "system.cpu_clk_domain", 
                "function_trace_start": 0, 
                "cpu_id": 0, 
                "checker": null, 
                "eventq_index": 0, 
                "default_p_state": "UNDEFINED", 
                "p_state_clk_gate_max": 1000000000000, 
                "toL2Bus": {
                    "point_of_coherency": false, 
                    "system": "system", 
                    "response_latency": 1, 
                    "cxx_class": "CoherentXBar", 
                    "forward_latency": 0, 
                    "clk_domain": "system.cpu_clk_domain", 
                    "width": 32, 
                    "eventq_index": 0, 
                    "default_p_state": "UNDEFINED", 
                    "p_state_clk_gate_max": 1000000000000, 
                    "master": {
                        "peer": [
                            "system.cpu.l2cache.cpu_side"
                        ], 
                        "role": "MASTER"
                    }, 
                    "type": "CoherentXBar", 
                    "frontend_latency": 1, 
                    "slave": {
                        "peer": [
                            "system.cpu.icache.mem_side", 
                            "system.cpu.dcache.mem_side"
                        ], 
                        "role": "SLAVE"
                    }, 
                    "p_state_clk_gate_min": 1000, 
                    "snoop_filter": {
                        "name": "snoop_filter", 
                        "system": "system", 
                        "max_capacity": 8388608, 
                        "eventq_index": 0, 
                        "cxx_class": "SnoopFilter", 
                        "path": "system.cpu.toL2Bus.snoop_filter", 
                        "type": "SnoopFilter", 
                        "lookup_latency": 0
                    }, 
                    "power_model": null, 
                    "path": "system.cpu.toL2Bus", 
                    "snoop_response_latency": 1, 
                    "name": "toL2Bus", 
                    "p_state_clk_gate_bins": 20, 
                    "use_default_range": false
                }, 
                "do_quiesce": true, 
                "type": "TimingSimpleCPU", 
                "profile": 0, 
                "icache_port": {
                    "peer": "system.cpu.icache.cpu_side", 
                    "role": "MASTER"
                }, 
                "p_state_clk_gate_bins": 20, 
                "p_state_clk_gate_min": 1000, 
                "syscallRetryLatency": 10000, 
                "interrupts": [
                    {
                        "eventq_index": 0, 
                        "path": "system.cpu.interrupts", 
                        "type": "RiscvInterrupts", 
                        "name": "interrupts", 
                        "cxx_class": "RiscvISA::Interrupts"
                    }
                ], 
                "dcache_port": {
                    "peer": "system.cpu.dcache.cpu_side", 
                    "role": "MASTER"
                }, 
                "socket_id": 0, 
                "power_model": null, 
                "max_insts_all_threads": 0, 
                "l2cache": {
                    "cpu_side": {
                        "peer": "system.cpu.toL2Bus.master[0]", 
                        "role": "SLAVE"
                    }, 
                    "clusivity": "mostly_incl", 
                    "prefetcher": null, 
                    "system": "system", 
                    "write_buffers": 8, 
                    "response_latency": 20, 
                    "cxx_class": "Cache", 
                    "size": 2097152, 
                    "type": "Cache", 
                    "clk_domain": "system.cpu_clk_domain", 
                    "max_miss_count": 0, 
                    "eventq_index": 0, 
                    "default_p_state": "UNDEFINED", 
                    "p_state_clk_gate_max": 1000000000000, 
                    "mem_side": {
                        "peer": "system.membus.slave[1]", 
                        "role": "MASTER"
                    }, 
                    "mshrs": 20, 
                    "writeback_clean": false, 
                    "p_state_clk_gate_min": 1000, 
                    "tags": {
                        "size": 2097152, 
                        "tag_latency": 20, 
                        "name": "tags", 
                        "p_state_clk_gate_min": 1000, 
                        "eventq_index": 0, 
                        "p_state_clk_gate_bins": 20, 
                        "default_p_state": "UNDEFINED", 
                        "clk_domain": "system.cpu_clk_domain", 
                        "power_model": null, 
                        "sequential_access": false, 
                        "assoc": 8, 
                        "cxx_class": "LRU", 
                        "p_state_clk_gate_max": 1000000000000, 
                        "path": "system.cpu.l2cache.tags", 
                        "block_size": 64, 
                        "type": "LRU", 
                        "data_latency": 20
                    }, 
                    "tgts_per_mshr": 12, 
                    "demand_mshr_reserve": 1, 
                    "power_model": null, 
                    "addr_ranges": [
                        "0:18446744073709551615:0:0:0:0"
                    ], 
                    "is_read_only": false, 
                    "prefetch_on_access": false, 
                    "path": "system.cpu.l2cache", 
                    "data_latency": 20, 
                    "tag_latency": 20, 
                    "name": "l2cache", 
                    "p_state_clk_gate_bins": 20, 
                    "sequential_access": false, 
                    "assoc": 8
                }, 
                "path": "system.cpu", 
                "max_loads_any_thread": 0, 
                "switched_out": false, 
                "workload": [
                    {
                        "uid": 100, 
                        "pid": 100, 
                        "kvmInSE": false, 
                        "cxx_class": "Process", 
                        "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/hello/bin/riscv/linux/hello", 
                        "drivers": [], 
                        "system": "system", 
                        "gid": 100, 
                        "eventq_index": 0, 
                        "env": [], 
                        "maxStackSize": 67108864, 
                        "ppid": 0, 
                        "type": "Process", 
                        "cwd": "", 
                        "pgid": 100, 
                        "simpoint": 0, 
                        "euid": 100, 
                        "input": "cin", 
                        "path": "system.cpu.workload", 
                        "name": "workload", 
                        "cmd": [
                            "hello"
                        ], 
                        "errout": "cerr", 
                        "useArchPT": false, 
                        "egid": 100, 
                        "output": "cout"
                    }
                ], 
                "name": "cpu", 
                "wait_for_remote_gdb": false, 
                "dtb": {
                    "name": "dtb", 
                    "eventq_index": 0, 
                    "cxx_class": "RiscvISA::TLB", 
                    "path": "system.cpu.dtb", 
                    "type": "RiscvTLB", 
                    "size": 64
                }, 
                "simpoint_start_insts": [], 
                "max_insts_any_thread": 0, 
                "progress_interval": 0, 
                "branchPred": null, 
                "dcache": {
                    "cpu_side": {
                        "peer": "system.cpu.dcache_port", 
                        "role": "SLAVE"
                    }, 
                    "clusivity": "mostly_incl", 
                    "prefetcher": null, 
                    "system": "system", 
                    "write_buffers": 8, 
                    "response_latency": 2, 
                    "cxx_class": "Cache", 
                    "size": 262144, 
                    "type": "Cache", 
                    "clk_domain": "system.cpu_clk_domain", 
                    "max_miss_count": 0, 
                    "eventq_index": 0, 
                    "default_p_state": "UNDEFINED", 
                    "p_state_clk_gate_max": 1000000000000, 
                    "mem_side": {
                        "peer": "system.cpu.toL2Bus.slave[1]", 
                        "role": "MASTER"
                    }, 
                    "mshrs": 4, 
                    "writeback_clean": false, 
                    "p_state_clk_gate_min": 1000, 
                    "tags": {
                        "size": 262144, 
                        "tag_latency": 2, 
                        "name": "tags", 
                        "p_state_clk_gate_min": 1000, 
                        "eventq_index": 0, 
                        "p_state_clk_gate_bins": 20, 
                        "default_p_state": "UNDEFINED", 
                        "clk_domain": "system.cpu_clk_domain", 
                        "power_model": null, 
                        "sequential_access": false, 
                        "assoc": 2, 
                        "cxx_class": "LRU", 
                        "p_state_clk_gate_max": 1000000000000, 
                        "path": "system.cpu.dcache.tags", 
                        "block_size": 64, 
                        "type": "LRU", 
                        "data_latency": 2
                    }, 
                    "tgts_per_mshr": 20, 
                    "demand_mshr_reserve": 1, 
                    "power_model": null, 
                    "addr_ranges": [
                        "0:18446744073709551615:0:0:0:0"
                    ], 
                    "is_read_only": false, 
                    "prefetch_on_access": false, 
                    "path": "system.cpu.dcache", 
                    "data_latency": 2, 
                    "tag_latency": 2, 
                    "name": "dcache", 
                    "p_state_clk_gate_bins": 20, 
                    "sequential_access": false, 
                    "assoc": 2
                }, 
                "isa": [
                    {
                        "eventq_index": 0, 
                        "path": "system.cpu.isa", 
                        "type": "RiscvISA", 
                        "name": "isa", 
                        "cxx_class": "RiscvISA::ISA"
                    }
                ], 
                "tracer": {
                    "eventq_index": 0, 
                    "path": "system.cpu.tracer", 
                    "type": "ExeTracer", 
                    "name": "tracer", 
                    "cxx_class": "Trace::ExeTracer"
                }
            }
        ], 
        "multi_thread": false, 
        "exit_on_work_items": false, 
        "work_item_id": -1, 
        "num_work_ids": 16
    }, 
    "time_sync_period": 100000000000, 
    "eventq_index": 0, 
    "time_sync_spin_threshold": 100000000, 
    "cxx_class": "Root", 
    "path": "root", 
    "time_sync_enable": false, 
    "type": "Root", 
    "full_system": false
}