| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000031 |
| sim_ticks 30915500 |
| final_tick 30915500 |
| sim_freq 1000000000000 |
| host_inst_rate 330902 |
| host_op_rate 330442 |
| host_tick_rate 1915496347 |
| host_mem_usage 261572 |
| host_seconds 0.02 |
| sim_insts 5327 |
| sim_ops 5327 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.physmem.bytes_read::cpu.inst 16320 |
| system.physmem.bytes_read::cpu.data 8576 |
| system.physmem.bytes_read::total 24896 |
| system.physmem.bytes_inst_read::cpu.inst 16320 |
| system.physmem.bytes_inst_read::total 16320 |
| system.physmem.num_reads::cpu.inst 255 |
| system.physmem.num_reads::cpu.data 134 |
| system.physmem.num_reads::total 389 |
| system.physmem.bw_read::cpu.inst 527890540 |
| system.physmem.bw_read::cpu.data 277401304 |
| system.physmem.bw_read::total 805291844 |
| system.physmem.bw_inst_read::cpu.inst 527890540 |
| system.physmem.bw_inst_read::total 527890540 |
| system.physmem.bw_total::cpu.inst 527890540 |
| system.physmem.bw_total::cpu.data 277401304 |
| system.physmem.bw_total::total 805291844 |
| system.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.workload.numSyscalls 11 |
| system.cpu.pwrStateResidencyTicks::ON 30915500 |
| system.cpu.numCycles 61831 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.committedInsts 5327 |
| system.cpu.committedOps 5327 |
| system.cpu.num_int_alu_accesses 4505 |
| system.cpu.num_fp_alu_accesses 0 |
| system.cpu.num_func_calls 146 |
| system.cpu.num_conditional_control_insts 773 |
| system.cpu.num_int_insts 4505 |
| system.cpu.num_fp_insts 0 |
| system.cpu.num_int_register_reads 10598 |
| system.cpu.num_int_register_writes 4845 |
| system.cpu.num_fp_register_reads 0 |
| system.cpu.num_fp_register_writes 0 |
| system.cpu.num_mem_refs 1401 |
| system.cpu.num_load_insts 723 |
| system.cpu.num_store_insts 678 |
| system.cpu.num_idle_cycles 0 |
| system.cpu.num_busy_cycles 61831 |
| system.cpu.not_idle_fraction 1 |
| system.cpu.idle_fraction 0 |
| system.cpu.Branches 1121 |
| system.cpu.op_class::No_OpClass 173 3.22% 3.22% |
| system.cpu.op_class::IntAlu 3796 70.69% 73.91% |
| system.cpu.op_class::IntMult 0 0.00% 73.91% |
| system.cpu.op_class::IntDiv 0 0.00% 73.91% |
| system.cpu.op_class::FloatAdd 0 0.00% 73.91% |
| system.cpu.op_class::FloatCmp 0 0.00% 73.91% |
| system.cpu.op_class::FloatCvt 0 0.00% 73.91% |
| system.cpu.op_class::FloatMult 0 0.00% 73.91% |
| system.cpu.op_class::FloatMultAcc 0 0.00% 73.91% |
| system.cpu.op_class::FloatDiv 0 0.00% 73.91% |
| system.cpu.op_class::FloatMisc 0 0.00% 73.91% |
| system.cpu.op_class::FloatSqrt 0 0.00% 73.91% |
| system.cpu.op_class::SimdAdd 0 0.00% 73.91% |
| system.cpu.op_class::SimdAddAcc 0 0.00% 73.91% |
| system.cpu.op_class::SimdAlu 0 0.00% 73.91% |
| system.cpu.op_class::SimdCmp 0 0.00% 73.91% |
| system.cpu.op_class::SimdCvt 0 0.00% 73.91% |
| system.cpu.op_class::SimdMisc 0 0.00% 73.91% |
| system.cpu.op_class::SimdMult 0 0.00% 73.91% |
| system.cpu.op_class::SimdMultAcc 0 0.00% 73.91% |
| system.cpu.op_class::SimdShift 0 0.00% 73.91% |
| system.cpu.op_class::SimdShiftAcc 0 0.00% 73.91% |
| system.cpu.op_class::SimdSqrt 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatAdd 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatAlu 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatCmp 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatCvt 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatDiv 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatMisc 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatMult 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% |
| system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% |
| system.cpu.op_class::MemRead 723 13.46% 87.37% |
| system.cpu.op_class::MemWrite 678 12.63% 100.00% |
| system.cpu.op_class::FloatMemRead 0 0.00% 100.00% |
| system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% |
| system.cpu.op_class::IprAccess 0 0.00% 100.00% |
| system.cpu.op_class::InstPrefetch 0 0.00% 100.00% |
| system.cpu.op_class::total 5370 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.dcache.tags.replacements 0 |
| system.cpu.dcache.tags.tagsinuse 81.942328 |
| system.cpu.dcache.tags.total_refs 1253 |
| system.cpu.dcache.tags.sampled_refs 135 |
| system.cpu.dcache.tags.avg_refs 9.281481 |
| system.cpu.dcache.tags.warmup_cycle 0 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 81.942328 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.020005 |
| system.cpu.dcache.tags.occ_percent::total 0.020005 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 135 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 28 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 107 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 0.032959 |
| system.cpu.dcache.tags.tag_accesses 2911 |
| system.cpu.dcache.tags.data_accesses 2911 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 661 |
| system.cpu.dcache.ReadReq_hits::total 661 |
| system.cpu.dcache.WriteReq_hits::cpu.data 592 |
| system.cpu.dcache.WriteReq_hits::total 592 |
| system.cpu.dcache.demand_hits::cpu.data 1253 |
| system.cpu.dcache.demand_hits::total 1253 |
| system.cpu.dcache.overall_hits::cpu.data 1253 |
| system.cpu.dcache.overall_hits::total 1253 |
| system.cpu.dcache.ReadReq_misses::cpu.data 54 |
| system.cpu.dcache.ReadReq_misses::total 54 |
| system.cpu.dcache.WriteReq_misses::cpu.data 81 |
| system.cpu.dcache.WriteReq_misses::total 81 |
| system.cpu.dcache.demand_misses::cpu.data 135 |
| system.cpu.dcache.demand_misses::total 135 |
| system.cpu.dcache.overall_misses::cpu.data 135 |
| system.cpu.dcache.overall_misses::total 135 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 3353000 |
| system.cpu.dcache.ReadReq_miss_latency::total 3353000 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 5103000 |
| system.cpu.dcache.WriteReq_miss_latency::total 5103000 |
| system.cpu.dcache.demand_miss_latency::cpu.data 8456000 |
| system.cpu.dcache.demand_miss_latency::total 8456000 |
| system.cpu.dcache.overall_miss_latency::cpu.data 8456000 |
| system.cpu.dcache.overall_miss_latency::total 8456000 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 715 |
| system.cpu.dcache.ReadReq_accesses::total 715 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 673 |
| system.cpu.dcache.WriteReq_accesses::total 673 |
| system.cpu.dcache.demand_accesses::cpu.data 1388 |
| system.cpu.dcache.demand_accesses::total 1388 |
| system.cpu.dcache.overall_accesses::cpu.data 1388 |
| system.cpu.dcache.overall_accesses::total 1388 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.075524 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.075524 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.120357 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.120357 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.097262 |
| system.cpu.dcache.demand_miss_rate::total 0.097262 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.097262 |
| system.cpu.dcache.overall_miss_rate::total 0.097262 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 62092.592593 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 62092.592593 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 62637.037037 |
| system.cpu.dcache.demand_avg_miss_latency::total 62637.037037 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 62637.037037 |
| system.cpu.dcache.overall_avg_miss_latency::total 62637.037037 |
| system.cpu.dcache.blocked_cycles::no_mshrs 0 |
| system.cpu.dcache.blocked_cycles::no_targets 0 |
| system.cpu.dcache.blocked::no_mshrs 0 |
| system.cpu.dcache.blocked::no_targets 0 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.dcache.avg_blocked_cycles::no_targets nan |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 54 |
| system.cpu.dcache.ReadReq_mshr_misses::total 54 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 81 |
| system.cpu.dcache.WriteReq_mshr_misses::total 81 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 135 |
| system.cpu.dcache.demand_mshr_misses::total 135 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 135 |
| system.cpu.dcache.overall_mshr_misses::total 135 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 3299000 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 3299000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 5022000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 5022000 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 8321000 |
| system.cpu.dcache.demand_mshr_miss_latency::total 8321000 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 8321000 |
| system.cpu.dcache.overall_mshr_miss_latency::total 8321000 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.075524 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.075524 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.120357 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.120357 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.097262 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.097262 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.097262 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.097262 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 61092.592593 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 61092.592593 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 61637.037037 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 61637.037037 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 61637.037037 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 61637.037037 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.icache.tags.replacements 0 |
| system.cpu.icache.tags.tagsinuse 116.844047 |
| system.cpu.icache.tags.total_refs 5114 |
| system.cpu.icache.tags.sampled_refs 257 |
| system.cpu.icache.tags.avg_refs 19.898833 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 116.844047 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.057053 |
| system.cpu.icache.tags.occ_percent::total 0.057053 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 257 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 98 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 159 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.125488 |
| system.cpu.icache.tags.tag_accesses 10999 |
| system.cpu.icache.tags.data_accesses 10999 |
| system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.icache.ReadReq_hits::cpu.inst 5114 |
| system.cpu.icache.ReadReq_hits::total 5114 |
| system.cpu.icache.demand_hits::cpu.inst 5114 |
| system.cpu.icache.demand_hits::total 5114 |
| system.cpu.icache.overall_hits::cpu.inst 5114 |
| system.cpu.icache.overall_hits::total 5114 |
| system.cpu.icache.ReadReq_misses::cpu.inst 257 |
| system.cpu.icache.ReadReq_misses::total 257 |
| system.cpu.icache.demand_misses::cpu.inst 257 |
| system.cpu.icache.demand_misses::total 257 |
| system.cpu.icache.overall_misses::cpu.inst 257 |
| system.cpu.icache.overall_misses::total 257 |
| system.cpu.icache.ReadReq_miss_latency::cpu.inst 16093500 |
| system.cpu.icache.ReadReq_miss_latency::total 16093500 |
| system.cpu.icache.demand_miss_latency::cpu.inst 16093500 |
| system.cpu.icache.demand_miss_latency::total 16093500 |
| system.cpu.icache.overall_miss_latency::cpu.inst 16093500 |
| system.cpu.icache.overall_miss_latency::total 16093500 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 5371 |
| system.cpu.icache.ReadReq_accesses::total 5371 |
| system.cpu.icache.demand_accesses::cpu.inst 5371 |
| system.cpu.icache.demand_accesses::total 5371 |
| system.cpu.icache.overall_accesses::cpu.inst 5371 |
| system.cpu.icache.overall_accesses::total 5371 |
| system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.047850 |
| system.cpu.icache.ReadReq_miss_rate::total 0.047850 |
| system.cpu.icache.demand_miss_rate::cpu.inst 0.047850 |
| system.cpu.icache.demand_miss_rate::total 0.047850 |
| system.cpu.icache.overall_miss_rate::cpu.inst 0.047850 |
| system.cpu.icache.overall_miss_rate::total 0.047850 |
| system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 62620.622568 |
| system.cpu.icache.ReadReq_avg_miss_latency::total 62620.622568 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 62620.622568 |
| system.cpu.icache.demand_avg_miss_latency::total 62620.622568 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 62620.622568 |
| system.cpu.icache.overall_avg_miss_latency::total 62620.622568 |
| system.cpu.icache.blocked_cycles::no_mshrs 0 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 0 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 257 |
| system.cpu.icache.ReadReq_mshr_misses::total 257 |
| system.cpu.icache.demand_mshr_misses::cpu.inst 257 |
| system.cpu.icache.demand_mshr_misses::total 257 |
| system.cpu.icache.overall_mshr_misses::cpu.inst 257 |
| system.cpu.icache.overall_mshr_misses::total 257 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 15836500 |
| system.cpu.icache.ReadReq_mshr_miss_latency::total 15836500 |
| system.cpu.icache.demand_mshr_miss_latency::cpu.inst 15836500 |
| system.cpu.icache.demand_mshr_miss_latency::total 15836500 |
| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 15836500 |
| system.cpu.icache.overall_mshr_miss_latency::total 15836500 |
| system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.047850 |
| system.cpu.icache.ReadReq_mshr_miss_rate::total 0.047850 |
| system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.047850 |
| system.cpu.icache.demand_mshr_miss_rate::total 0.047850 |
| system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.047850 |
| system.cpu.icache.overall_mshr_miss_rate::total 0.047850 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 61620.622568 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 61620.622568 |
| system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 61620.622568 |
| system.cpu.icache.demand_avg_mshr_miss_latency::total 61620.622568 |
| system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 61620.622568 |
| system.cpu.icache.overall_avg_mshr_miss_latency::total 61620.622568 |
| system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.l2cache.tags.replacements 0 |
| system.cpu.l2cache.tags.tagsinuse 197.305193 |
| system.cpu.l2cache.tags.total_refs 3 |
| system.cpu.l2cache.tags.sampled_refs 389 |
| system.cpu.l2cache.tags.avg_refs 0.007712 |
| system.cpu.l2cache.tags.warmup_cycle 0 |
| system.cpu.l2cache.tags.occ_blocks::cpu.inst 116.297024 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 81.008169 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003549 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.002472 |
| system.cpu.l2cache.tags.occ_percent::total 0.006021 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 389 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 124 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 265 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 0.011871 |
| system.cpu.l2cache.tags.tag_accesses 3525 |
| system.cpu.l2cache.tags.data_accesses 3525 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 2 |
| system.cpu.l2cache.ReadCleanReq_hits::total 2 |
| system.cpu.l2cache.ReadSharedReq_hits::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_hits::total 1 |
| system.cpu.l2cache.demand_hits::cpu.inst 2 |
| system.cpu.l2cache.demand_hits::cpu.data 1 |
| system.cpu.l2cache.demand_hits::total 3 |
| system.cpu.l2cache.overall_hits::cpu.inst 2 |
| system.cpu.l2cache.overall_hits::cpu.data 1 |
| system.cpu.l2cache.overall_hits::total 3 |
| system.cpu.l2cache.ReadExReq_misses::cpu.data 81 |
| system.cpu.l2cache.ReadExReq_misses::total 81 |
| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 255 |
| system.cpu.l2cache.ReadCleanReq_misses::total 255 |
| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 53 |
| system.cpu.l2cache.ReadSharedReq_misses::total 53 |
| system.cpu.l2cache.demand_misses::cpu.inst 255 |
| system.cpu.l2cache.demand_misses::cpu.data 134 |
| system.cpu.l2cache.demand_misses::total 389 |
| system.cpu.l2cache.overall_misses::cpu.inst 255 |
| system.cpu.l2cache.overall_misses::cpu.data 134 |
| system.cpu.l2cache.overall_misses::total 389 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 4900500 |
| system.cpu.l2cache.ReadExReq_miss_latency::total 4900500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 15428000 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 15428000 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 3206500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::total 3206500 |
| system.cpu.l2cache.demand_miss_latency::cpu.inst 15428000 |
| system.cpu.l2cache.demand_miss_latency::cpu.data 8107000 |
| system.cpu.l2cache.demand_miss_latency::total 23535000 |
| system.cpu.l2cache.overall_miss_latency::cpu.inst 15428000 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 8107000 |
| system.cpu.l2cache.overall_miss_latency::total 23535000 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 81 |
| system.cpu.l2cache.ReadExReq_accesses::total 81 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 257 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 257 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 54 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 54 |
| system.cpu.l2cache.demand_accesses::cpu.inst 257 |
| system.cpu.l2cache.demand_accesses::cpu.data 135 |
| system.cpu.l2cache.demand_accesses::total 392 |
| system.cpu.l2cache.overall_accesses::cpu.inst 257 |
| system.cpu.l2cache.overall_accesses::cpu.data 135 |
| system.cpu.l2cache.overall_accesses::total 392 |
| system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.992218 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.992218 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.981481 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.981481 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.992218 |
| system.cpu.l2cache.demand_miss_rate::cpu.data 0.992593 |
| system.cpu.l2cache.demand_miss_rate::total 0.992347 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.992218 |
| system.cpu.l2cache.overall_miss_rate::cpu.data 0.992593 |
| system.cpu.l2cache.overall_miss_rate::total 0.992347 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60501.960784 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60501.960784 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60501.960784 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::total 60501.285347 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60501.960784 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.overall_avg_miss_latency::total 60501.285347 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 81 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 81 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 255 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 255 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 53 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 53 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 255 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 134 |
| system.cpu.l2cache.demand_mshr_misses::total 389 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 255 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 134 |
| system.cpu.l2cache.overall_mshr_misses::total 389 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 4090500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 4090500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 12878000 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 12878000 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 2676500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 2676500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 12878000 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 6767000 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 19645000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 12878000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 6767000 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 19645000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.992218 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.992218 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.981481 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.981481 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.992218 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.992593 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.992347 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.992218 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.992593 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.992347 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50501.960784 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50501.960784 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50501.960784 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.285347 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50501.960784 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.285347 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 392 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 3 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 311 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 81 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 81 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 257 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 54 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 514 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 270 |
| system.cpu.toL2Bus.pkt_count::total 784 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 16448 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8640 |
| system.cpu.toL2Bus.pkt_size::total 25088 |
| system.cpu.toL2Bus.snoops 0 |
| system.cpu.toL2Bus.snoopTraffic 0 |
| system.cpu.toL2Bus.snoop_fanout::samples 392 |
| system.cpu.toL2Bus.snoop_fanout::mean 0.007653 |
| system.cpu.toL2Bus.snoop_fanout::stdev 0.087258 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 389 99.23% 99.23% |
| system.cpu.toL2Bus.snoop_fanout::1 3 0.77% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 1 |
| system.cpu.toL2Bus.snoop_fanout::total 392 |
| system.cpu.toL2Bus.reqLayer0.occupancy 196000 |
| system.cpu.toL2Bus.reqLayer0.utilization 0.6 |
| system.cpu.toL2Bus.respLayer0.occupancy 385500 |
| system.cpu.toL2Bus.respLayer0.utilization 1.2 |
| system.cpu.toL2Bus.respLayer1.occupancy 202500 |
| system.cpu.toL2Bus.respLayer1.utilization 0.7 |
| system.membus.snoop_filter.tot_requests 389 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 30915500 |
| system.membus.trans_dist::ReadResp 308 |
| system.membus.trans_dist::ReadExReq 81 |
| system.membus.trans_dist::ReadExResp 81 |
| system.membus.trans_dist::ReadSharedReq 308 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 778 |
| system.membus.pkt_count::total 778 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 24896 |
| system.membus.pkt_size::total 24896 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 389 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 389 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 389 |
| system.membus.reqLayer0.occupancy 389500 |
| system.membus.reqLayer0.utilization 1.3 |
| system.membus.respLayer1.occupancy 1945000 |
| system.membus.respLayer1.utilization 6.3 |
| |
| ---------- End Simulation Statistics ---------- |
