| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000031 |
| sim_ticks 31247500 |
| final_tick 31247500 |
| sim_freq 1000000000000 |
| host_inst_rate 194718 |
| host_op_rate 352470 |
| host_tick_rate 1129073998 |
| host_mem_usage 278812 |
| host_seconds 0.03 |
| sim_insts 5381 |
| sim_ops 9748 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.physmem.bytes_read::cpu.inst 14528 |
| system.physmem.bytes_read::cpu.data 8576 |
| system.physmem.bytes_read::total 23104 |
| system.physmem.bytes_inst_read::cpu.inst 14528 |
| system.physmem.bytes_inst_read::total 14528 |
| system.physmem.num_reads::cpu.inst 227 |
| system.physmem.num_reads::cpu.data 134 |
| system.physmem.num_reads::total 361 |
| system.physmem.bw_read::cpu.inst 464933195 |
| system.physmem.bw_read::cpu.data 274453956 |
| system.physmem.bw_read::total 739387151 |
| system.physmem.bw_inst_read::cpu.inst 464933195 |
| system.physmem.bw_inst_read::total 464933195 |
| system.physmem.bw_total::cpu.inst 464933195 |
| system.physmem.bw_total::cpu.data 274453956 |
| system.physmem.bw_total::total 739387151 |
| system.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.apic_clk_domain.clock 8000 |
| system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.workload.numSyscalls 11 |
| system.cpu.pwrStateResidencyTicks::ON 31247500 |
| system.cpu.numCycles 62495 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.committedInsts 5381 |
| system.cpu.committedOps 9748 |
| system.cpu.num_int_alu_accesses 9654 |
| system.cpu.num_fp_alu_accesses 0 |
| system.cpu.num_func_calls 209 |
| system.cpu.num_conditional_control_insts 899 |
| system.cpu.num_int_insts 9654 |
| system.cpu.num_fp_insts 0 |
| system.cpu.num_int_register_reads 18335 |
| system.cpu.num_int_register_writes 7527 |
| system.cpu.num_fp_register_reads 0 |
| system.cpu.num_fp_register_writes 0 |
| system.cpu.num_cc_register_reads 6487 |
| system.cpu.num_cc_register_writes 3536 |
| system.cpu.num_mem_refs 1988 |
| system.cpu.num_load_insts 1053 |
| system.cpu.num_store_insts 935 |
| system.cpu.num_idle_cycles 0 |
| system.cpu.num_busy_cycles 62495 |
| system.cpu.not_idle_fraction 1 |
| system.cpu.idle_fraction 0 |
| system.cpu.Branches 1208 |
| system.cpu.op_class::No_OpClass 1 0.01% 0.01% |
| system.cpu.op_class::IntAlu 7749 79.49% 79.50% |
| system.cpu.op_class::IntMult 3 0.03% 79.53% |
| system.cpu.op_class::IntDiv 7 0.07% 79.61% |
| system.cpu.op_class::FloatAdd 0 0.00% 79.61% |
| system.cpu.op_class::FloatCmp 0 0.00% 79.61% |
| system.cpu.op_class::FloatCvt 0 0.00% 79.61% |
| system.cpu.op_class::FloatMult 0 0.00% 79.61% |
| system.cpu.op_class::FloatMultAcc 0 0.00% 79.61% |
| system.cpu.op_class::FloatDiv 0 0.00% 79.61% |
| system.cpu.op_class::FloatMisc 0 0.00% 79.61% |
| system.cpu.op_class::FloatSqrt 0 0.00% 79.61% |
| system.cpu.op_class::SimdAdd 0 0.00% 79.61% |
| system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% |
| system.cpu.op_class::SimdAlu 0 0.00% 79.61% |
| system.cpu.op_class::SimdCmp 0 0.00% 79.61% |
| system.cpu.op_class::SimdCvt 0 0.00% 79.61% |
| system.cpu.op_class::SimdMisc 0 0.00% 79.61% |
| system.cpu.op_class::SimdMult 0 0.00% 79.61% |
| system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% |
| system.cpu.op_class::SimdShift 0 0.00% 79.61% |
| system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% |
| system.cpu.op_class::SimdSqrt 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% |
| system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% |
| system.cpu.op_class::MemRead 1053 10.80% 90.41% |
| system.cpu.op_class::MemWrite 935 9.59% 100.00% |
| system.cpu.op_class::FloatMemRead 0 0.00% 100.00% |
| system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% |
| system.cpu.op_class::IprAccess 0 0.00% 100.00% |
| system.cpu.op_class::InstPrefetch 0 0.00% 100.00% |
| system.cpu.op_class::total 9748 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.dcache.tags.replacements 0 |
| system.cpu.dcache.tags.tagsinuse 80.527852 |
| system.cpu.dcache.tags.total_refs 1854 |
| system.cpu.dcache.tags.sampled_refs 134 |
| system.cpu.dcache.tags.avg_refs 13.835821 |
| system.cpu.dcache.tags.warmup_cycle 0 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 80.527852 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.019660 |
| system.cpu.dcache.tags.occ_percent::total 0.019660 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 134 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 31 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 103 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 0.032715 |
| system.cpu.dcache.tags.tag_accesses 4110 |
| system.cpu.dcache.tags.data_accesses 4110 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 998 |
| system.cpu.dcache.ReadReq_hits::total 998 |
| system.cpu.dcache.WriteReq_hits::cpu.data 856 |
| system.cpu.dcache.WriteReq_hits::total 856 |
| system.cpu.dcache.demand_hits::cpu.data 1854 |
| system.cpu.dcache.demand_hits::total 1854 |
| system.cpu.dcache.overall_hits::cpu.data 1854 |
| system.cpu.dcache.overall_hits::total 1854 |
| system.cpu.dcache.ReadReq_misses::cpu.data 55 |
| system.cpu.dcache.ReadReq_misses::total 55 |
| system.cpu.dcache.WriteReq_misses::cpu.data 79 |
| system.cpu.dcache.WriteReq_misses::total 79 |
| system.cpu.dcache.demand_misses::cpu.data 134 |
| system.cpu.dcache.demand_misses::total 134 |
| system.cpu.dcache.overall_misses::cpu.data 134 |
| system.cpu.dcache.overall_misses::total 134 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 3465000 |
| system.cpu.dcache.ReadReq_miss_latency::total 3465000 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 4977000 |
| system.cpu.dcache.WriteReq_miss_latency::total 4977000 |
| system.cpu.dcache.demand_miss_latency::cpu.data 8442000 |
| system.cpu.dcache.demand_miss_latency::total 8442000 |
| system.cpu.dcache.overall_miss_latency::cpu.data 8442000 |
| system.cpu.dcache.overall_miss_latency::total 8442000 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 1053 |
| system.cpu.dcache.ReadReq_accesses::total 1053 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 935 |
| system.cpu.dcache.WriteReq_accesses::total 935 |
| system.cpu.dcache.demand_accesses::cpu.data 1988 |
| system.cpu.dcache.demand_accesses::total 1988 |
| system.cpu.dcache.overall_accesses::cpu.data 1988 |
| system.cpu.dcache.overall_accesses::total 1988 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.052232 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.052232 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.084492 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.084492 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.067404 |
| system.cpu.dcache.demand_miss_rate::total 0.067404 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.067404 |
| system.cpu.dcache.overall_miss_rate::total 0.067404 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.demand_avg_miss_latency::total 63000 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.overall_avg_miss_latency::total 63000 |
| system.cpu.dcache.blocked_cycles::no_mshrs 0 |
| system.cpu.dcache.blocked_cycles::no_targets 0 |
| system.cpu.dcache.blocked::no_mshrs 0 |
| system.cpu.dcache.blocked::no_targets 0 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.dcache.avg_blocked_cycles::no_targets nan |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 55 |
| system.cpu.dcache.ReadReq_mshr_misses::total 55 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 79 |
| system.cpu.dcache.WriteReq_mshr_misses::total 79 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 134 |
| system.cpu.dcache.demand_mshr_misses::total 134 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 134 |
| system.cpu.dcache.overall_mshr_misses::total 134 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 3410000 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 3410000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 4898000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 4898000 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 8308000 |
| system.cpu.dcache.demand_mshr_miss_latency::total 8308000 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 8308000 |
| system.cpu.dcache.overall_mshr_miss_latency::total 8308000 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.052232 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.052232 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.084492 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.084492 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.067404 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.067404 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.067404 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.067404 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 62000 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.icache.tags.replacements 0 |
| system.cpu.icache.tags.tagsinuse 105.231814 |
| system.cpu.icache.tags.total_refs 6637 |
| system.cpu.icache.tags.sampled_refs 228 |
| system.cpu.icache.tags.avg_refs 29.109649 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 105.231814 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.051383 |
| system.cpu.icache.tags.occ_percent::total 0.051383 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 228 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 84 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 144 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.111328 |
| system.cpu.icache.tags.tag_accesses 13958 |
| system.cpu.icache.tags.data_accesses 13958 |
| system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.icache.ReadReq_hits::cpu.inst 6637 |
| system.cpu.icache.ReadReq_hits::total 6637 |
| system.cpu.icache.demand_hits::cpu.inst 6637 |
| system.cpu.icache.demand_hits::total 6637 |
| system.cpu.icache.overall_hits::cpu.inst 6637 |
| system.cpu.icache.overall_hits::total 6637 |
| system.cpu.icache.ReadReq_misses::cpu.inst 228 |
| system.cpu.icache.ReadReq_misses::total 228 |
| system.cpu.icache.demand_misses::cpu.inst 228 |
| system.cpu.icache.demand_misses::total 228 |
| system.cpu.icache.overall_misses::cpu.inst 228 |
| system.cpu.icache.overall_misses::total 228 |
| system.cpu.icache.ReadReq_miss_latency::cpu.inst 14315500 |
| system.cpu.icache.ReadReq_miss_latency::total 14315500 |
| system.cpu.icache.demand_miss_latency::cpu.inst 14315500 |
| system.cpu.icache.demand_miss_latency::total 14315500 |
| system.cpu.icache.overall_miss_latency::cpu.inst 14315500 |
| system.cpu.icache.overall_miss_latency::total 14315500 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 6865 |
| system.cpu.icache.ReadReq_accesses::total 6865 |
| system.cpu.icache.demand_accesses::cpu.inst 6865 |
| system.cpu.icache.demand_accesses::total 6865 |
| system.cpu.icache.overall_accesses::cpu.inst 6865 |
| system.cpu.icache.overall_accesses::total 6865 |
| system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.033212 |
| system.cpu.icache.ReadReq_miss_rate::total 0.033212 |
| system.cpu.icache.demand_miss_rate::cpu.inst 0.033212 |
| system.cpu.icache.demand_miss_rate::total 0.033212 |
| system.cpu.icache.overall_miss_rate::cpu.inst 0.033212 |
| system.cpu.icache.overall_miss_rate::total 0.033212 |
| system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 62787.280702 |
| system.cpu.icache.ReadReq_avg_miss_latency::total 62787.280702 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 62787.280702 |
| system.cpu.icache.demand_avg_miss_latency::total 62787.280702 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 62787.280702 |
| system.cpu.icache.overall_avg_miss_latency::total 62787.280702 |
| system.cpu.icache.blocked_cycles::no_mshrs 0 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 0 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 228 |
| system.cpu.icache.ReadReq_mshr_misses::total 228 |
| system.cpu.icache.demand_mshr_misses::cpu.inst 228 |
| system.cpu.icache.demand_mshr_misses::total 228 |
| system.cpu.icache.overall_mshr_misses::cpu.inst 228 |
| system.cpu.icache.overall_mshr_misses::total 228 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 14087500 |
| system.cpu.icache.ReadReq_mshr_miss_latency::total 14087500 |
| system.cpu.icache.demand_mshr_miss_latency::cpu.inst 14087500 |
| system.cpu.icache.demand_mshr_miss_latency::total 14087500 |
| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 14087500 |
| system.cpu.icache.overall_mshr_miss_latency::total 14087500 |
| system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.033212 |
| system.cpu.icache.ReadReq_mshr_miss_rate::total 0.033212 |
| system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.033212 |
| system.cpu.icache.demand_mshr_miss_rate::total 0.033212 |
| system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.033212 |
| system.cpu.icache.overall_mshr_miss_rate::total 0.033212 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 61787.280702 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 61787.280702 |
| system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 61787.280702 |
| system.cpu.icache.demand_avg_mshr_miss_latency::total 61787.280702 |
| system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 61787.280702 |
| system.cpu.icache.overall_avg_mshr_miss_latency::total 61787.280702 |
| system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.l2cache.tags.replacements 0 |
| system.cpu.l2cache.tags.tagsinuse 185.792229 |
| system.cpu.l2cache.tags.total_refs 1 |
| system.cpu.l2cache.tags.sampled_refs 361 |
| system.cpu.l2cache.tags.avg_refs 0.002770 |
| system.cpu.l2cache.tags.warmup_cycle 0 |
| system.cpu.l2cache.tags.occ_blocks::cpu.inst 105.219349 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 80.572880 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003211 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.002459 |
| system.cpu.l2cache.tags.occ_percent::total 0.005670 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 361 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 114 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 247 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 0.011017 |
| system.cpu.l2cache.tags.tag_accesses 3257 |
| system.cpu.l2cache.tags.data_accesses 3257 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 31247500 |
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| system.cpu.l2cache.ReadCleanReq_hits::total 1 |
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| system.cpu.l2cache.overall_hits::cpu.inst 1 |
| system.cpu.l2cache.overall_hits::total 1 |
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| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 227 |
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| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 55 |
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| system.cpu.l2cache.demand_misses::cpu.inst 227 |
| system.cpu.l2cache.demand_misses::cpu.data 134 |
| system.cpu.l2cache.demand_misses::total 361 |
| system.cpu.l2cache.overall_misses::cpu.inst 227 |
| system.cpu.l2cache.overall_misses::cpu.data 134 |
| system.cpu.l2cache.overall_misses::total 361 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 4779500 |
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| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 13734000 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 13734000 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 3327500 |
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| system.cpu.l2cache.demand_miss_latency::cpu.inst 13734000 |
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| system.cpu.l2cache.overall_miss_latency::cpu.inst 13734000 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 8107000 |
| system.cpu.l2cache.overall_miss_latency::total 21841000 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 79 |
| system.cpu.l2cache.ReadExReq_accesses::total 79 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 228 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 228 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 55 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 55 |
| system.cpu.l2cache.demand_accesses::cpu.inst 228 |
| system.cpu.l2cache.demand_accesses::cpu.data 134 |
| system.cpu.l2cache.demand_accesses::total 362 |
| system.cpu.l2cache.overall_accesses::cpu.inst 228 |
| system.cpu.l2cache.overall_accesses::cpu.data 134 |
| system.cpu.l2cache.overall_accesses::total 362 |
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| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.995614 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.995614 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 1 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.995614 |
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| system.cpu.l2cache.demand_miss_rate::total 0.997238 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.995614 |
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| system.cpu.l2cache.overall_miss_rate::total 0.997238 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60502.202643 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60502.202643 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60502.202643 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::total 60501.385042 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60502.202643 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.overall_avg_miss_latency::total 60501.385042 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 79 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 79 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 227 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 227 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 55 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 55 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 227 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 134 |
| system.cpu.l2cache.demand_mshr_misses::total 361 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 227 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 134 |
| system.cpu.l2cache.overall_mshr_misses::total 361 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 3989500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 3989500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 11464000 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 11464000 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 2777500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 2777500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 11464000 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 6767000 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 18231000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 11464000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 6767000 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 18231000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.995614 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.995614 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.995614 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.997238 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.995614 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.997238 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50502.202643 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50502.202643 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50502.202643 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.385042 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50502.202643 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.385042 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 362 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 1 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 283 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 79 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 79 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 228 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 55 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 456 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 268 |
| system.cpu.toL2Bus.pkt_count::total 724 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 14592 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8576 |
| system.cpu.toL2Bus.pkt_size::total 23168 |
| system.cpu.toL2Bus.snoops 0 |
| system.cpu.toL2Bus.snoopTraffic 0 |
| system.cpu.toL2Bus.snoop_fanout::samples 362 |
| system.cpu.toL2Bus.snoop_fanout::mean 0.002762 |
| system.cpu.toL2Bus.snoop_fanout::stdev 0.052559 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 361 99.72% 99.72% |
| system.cpu.toL2Bus.snoop_fanout::1 1 0.28% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 1 |
| system.cpu.toL2Bus.snoop_fanout::total 362 |
| system.cpu.toL2Bus.reqLayer0.occupancy 181000 |
| system.cpu.toL2Bus.reqLayer0.utilization 0.6 |
| system.cpu.toL2Bus.respLayer0.occupancy 342000 |
| system.cpu.toL2Bus.respLayer0.utilization 1.1 |
| system.cpu.toL2Bus.respLayer1.occupancy 201000 |
| system.cpu.toL2Bus.respLayer1.utilization 0.6 |
| system.membus.snoop_filter.tot_requests 361 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 31247500 |
| system.membus.trans_dist::ReadResp 282 |
| system.membus.trans_dist::ReadExReq 79 |
| system.membus.trans_dist::ReadExResp 79 |
| system.membus.trans_dist::ReadSharedReq 282 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 722 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::total 722 |
| system.membus.pkt_count::total 722 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 23104 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::total 23104 |
| system.membus.pkt_size::total 23104 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 361 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 361 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 361 |
| system.membus.reqLayer0.occupancy 361500 |
| system.membus.reqLayer0.utilization 1.2 |
| system.membus.respLayer1.occupancy 1805000 |
| system.membus.respLayer1.utilization 5.8 |
| |
| ---------- End Simulation Statistics ---------- |
