)]}'
{
  "commit": "dfa3c073cfd0112ab834fbf7d1056e0aa2a090e3",
  "tree": "f3dcd6a711ae7dfeec889fa4bf1b597fcfacd396",
  "parents": [
    "2579bacf06eb57b75b7fae1c9b1b133fa64f9841"
  ],
  "author": {
    "name": "Prajwal Hegde",
    "email": "prhegde@wisc.edu",
    "time": "Thu Apr 27 14:38:36 2023 -0500"
  },
  "committer": {
    "name": "Prajwal Rathnakar Hegde",
    "email": "prhegde@wisc.edu",
    "time": "Wed May 24 01:22:30 2023 +0000"
  },
  "message": "arch-arm,cpu: Add four Arm SVE2 int instructions\n\nThis changeset adds ARM SVE2 integer instructions\n- ADCLB, ADCLT, SBCLB, SBCLT\n- Decoding logic as per sve encoding of Version: 2023-03\n\nChange-Id: I1bd3fe24b33677baa0b6da3c1dd7423f2b13b2c6\nReviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70137\nTested-by: kokoro \u003cnoreply+kokoro@google.com\u003e\nReviewed-by: Giacomo Travaglini \u003cgiacomo.travaglini@arm.com\u003e\nMaintainer: Giacomo Travaglini \u003cgiacomo.travaglini@arm.com\u003e\n",
  "tree_diff": [
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