| commit | eafc6ea626ef0f70eab74a7d4e8d1466412a23a1 | [log] [tgz] |
|---|---|---|
| author | Samuel Stark <samuel.stark2@arm.com> | Tue Nov 02 08:53:02 2021 +0000 |
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | Wed Apr 06 16:17:57 2022 +0000 |
| tree | 6d88eb7bd70ba496498a5bebaf00ed2c8e91fa4c | |
| parent | 38fe886ee35b6f9a9946433239f73c92d4f25aa8 [diff] |
cpu: Handle external TLBI Sync requests in TimingCPU JIRA: https://gem5.atlassian.net/browse/GEM5-1097 Change-Id: I4e92f7886a296f119720b8bcda6bea722df76153 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57291 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>