kvm: Some various changes to make KVM work

I really have no idea what's in the changeset. But it seems to be
required to get KVM to work on the CSL machines with RHEL6.

Patch is from Nilay.

Change-Id: Ic5e74f970599e454a285b8b6f2ac7526746fbac8
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 031457c..3d47d27 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -141,6 +141,7 @@
         test_sys.have_virtualization = True
 
     test_sys.init_param = options.init_param
+    test_sys.eventq_index = np
 
     # For now, assign all the CPUs to the same clock domain
     test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i)
@@ -230,6 +231,12 @@
 
         MemConfig.config_mem(options, test_sys)
 
+    test_sys.eventq_index = 0
+    for idx, cpu in enumerate(test_sys.cpu):
+        for obj in cpu.descendants():
+            obj.eventq_index = test_sys.eventq_index
+        cpu.eventq_index = idx + 1
+
     return test_sys
 
 def build_drive_system(np):
@@ -395,5 +402,6 @@
 elif buildEnv['TARGET_ISA'] != "arm" and options.generate_dtb:
     fatal("Can only generate dtb files for ARM systems.")
 
+root.sim_quantum = 1000000000
 Simulation.setWorkCountOptions(test_sys, options)
 Simulation.run(options, root, test_sys, FutureClass)
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 0ef79a4..33dd3f6 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -361,10 +361,10 @@
 uint32_t
 X86ISA::Interrupts::readReg(ApicRegIndex reg)
 {
-    if (reg >= APIC_TRIGGER_MODE(0) &&
-            reg <= APIC_TRIGGER_MODE(15)) {
-        panic("Local APIC Trigger Mode registers are unimplemented.\n");
-    }
+    //if (reg >= APIC_TRIGGER_MODE(0) &&
+    //        reg <= APIC_TRIGGER_MODE(15)) {
+    //    panic("Local APIC Trigger Mode registers are unimplemented.\n");
+    //}
     switch (reg) {
       case APIC_ARBITRATION_PRIORITY:
         panic("Local APIC Arbitration Priority register unimplemented.\n");
@@ -404,10 +404,10 @@
             reg <= APIC_IN_SERVICE(15)) {
         panic("Local APIC In-Service registers are unimplemented.\n");
     }
-    if (reg >= APIC_TRIGGER_MODE(0) &&
-            reg <= APIC_TRIGGER_MODE(15)) {
-        panic("Local APIC Trigger Mode registers are unimplemented.\n");
-    }
+    //if (reg >= APIC_TRIGGER_MODE(0) &&
+    //        reg <= APIC_TRIGGER_MODE(15)) {
+    //    panic("Local APIC Trigger Mode registers are unimplemented.\n");
+    //}
     if (reg >= APIC_INTERRUPT_REQUEST(0) &&
             reg <= APIC_INTERRUPT_REQUEST(15)) {
         panic("Local APIC Interrupt Request registers "
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 3df0fdd..3859d97 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -1298,6 +1298,7 @@
     // exclude_host since different architectures use slightly
     // different APIs in the kernel.
     cfgCycles.exclude_hv(true)
+        .exclude_kernel(true)
         .exclude_host(true);
 
     if (perfControlledByTimer) {
@@ -1376,6 +1377,7 @@
     // exclude_host since different architectures use slightly
     // different APIs in the kernel.
     cfgInstructions.exclude_hv(true)
+        .exclude_kernel(true)
         .exclude_host(true);
 
     if (period) {
diff --git a/src/cpu/kvm/perfevent.hh b/src/cpu/kvm/perfevent.hh
index b1b0da2..a42b6cf 100644
--- a/src/cpu/kvm/perfevent.hh
+++ b/src/cpu/kvm/perfevent.hh
@@ -160,6 +160,19 @@
         return *this;
     }
 
+    /**
+     * Exclude the hyper visor (i.e., only include events from the
+     * guest system).
+     *
+     * @warn This is attribute only seems to be ignored on Intel.
+     *
+     * @param val true to exclude host events
+     */
+    PerfKvmCounterConfig &exclude_kernel(bool val) {
+        attr.exclude_kernel = val;
+        return *this;
+    }
+
     /** Underlying perf_event_attr structure describing the counter */
     struct perf_event_attr attr;
 };
diff --git a/src/cpu/kvm/vm.cc b/src/cpu/kvm/vm.cc
index 47e7492..85bf2bb 100644
--- a/src/cpu/kvm/vm.cc
+++ b/src/cpu/kvm/vm.cc
@@ -234,7 +234,7 @@
         if (errno == E2BIG)
             return false;
         else
-            panic("KVM: Failed to get supported CPUID (errno: %i)\n", errno);
+            panic("KVM: Failed to get supported MSRs (errno: %i)\n", errno);
     } else
         return true;
 }
diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc
index 3d22bb3..57ca14e 100644
--- a/src/cpu/kvm/x86_cpu.cc
+++ b/src/cpu/kvm/x86_cpu.cc
@@ -186,10 +186,12 @@
 dumpKvm(const char *reg_name, const struct kvm_segment &seg)
 {
     inform("\t%s: @0x%llx+%x [sel: 0x%x, type: 0x%x]\n"
-           "\t\tpres.: %u, dpl: %u, db: %u, s: %u, l: %u, g: %u, avl: %u, unus.: %u\n",
+           "\t\tpres.: %u, dpl: %u, db: %u, s: %u, l: %u, g: %u, avl: %u, "
+           "unus.: %u\n",
            reg_name,
            seg.base, seg.limit, seg.selector, seg.type,
-           seg.present, seg.dpl, seg.db, seg.s, seg.l, seg.g, seg.avl, seg.unusable);
+           seg.present, seg.dpl, seg.db, seg.s, seg.l, seg.g, seg.avl,
+           seg.unusable);
 }
 
 static void
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index dc37a8c..7b390be 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -441,6 +441,7 @@
 
 
     Tick when = curTick() + delay * SimClock::Int::ns;
+    period = 0;
     Tick repeat = period * SimClock::Int::ns;
 
     Stats::schedStatEvent(false, true, when, repeat);