commit f7d0808a5c87a7ca3349bc3e68bb33a4fe912d3c
author Roger Chang <rogerycchang@google.com> Wed Nov 30 16:36:05 2022 +0800
committer Roger Chang <rogerycchang@google.com> Wed Dec 14 01:53:08 2022 +0000
tree 09e742bf3605dba67f9f6ff8d4dfcc2f9dc092e0
parent 2ed43238994e3fcb938c238f1b132385abfb4d7e

arch-riscv: Fork Zba, Zbb, Zbc, Zbs instructions into rv32 / rv64

The following instructions will be supported for both rv32 and rv64

Zba extensions:
SLLI.UW
SH1ADD
SH2ADD
SH3ADD
ADD.UW
SH1ADD.UW
SH2ADD.UW
SH3ADD.UW

Zbb extensions:
CLZ
CTZ
CPOP
SEXT.B
SEXT.H
ORC.B
RORI
REV8
CLZW
CTZW
CPOPW
RORIW
ROL
MIN
XNOR
MINU
ROR
MAX
ORN
MAXU
ANDN
ROLW
ZEXT.H
RORW

Zbc extensions:
CLMUL
CLMULR
CLMULH

Zbs extensions:
BSETI
BCLRI
BINVI
BEXTI
BSET
BCLR
BINV
BEXT

Change-Id: I3f489a3a1bab8799e2d95218740e495313b9961d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66211
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>