arch-riscv: Consistently check privilege mode for CSR accesses
According to the RISC-V privileged spec (section 2.1), bits 8 and 9 of
the CSR number encode the lowest privilege mode that is permitted to
access the CSR. Commit 55e7d3e5b6f062659bad5f6fdc8469ce80f102dd added
this check for for CSR_MSTATUS but none of the other CSRs.
Change-Id: Iecf2e387fa9ee810e8b8471341bfa371693b97c5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55404
Reviewed-by: Nils Asmussen <nils.asmussen@barkhauseninstitut.org>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
1 file changed
