)]}'
{
  "commit": "8c47c0dd63f495a058e3a25906a39a352113c2a6",
  "tree": "64c05391910a6c30cc98618cfcd487d7c84c0397",
  "parents": [
    "43512da4b2530bf1afd0f2a7c223add8df07cb23"
  ],
  "author": {
    "name": "Tiago Mück",
    "email": "tiago.muck@arm.com",
    "time": "Thu May 28 21:36:40 2020 -0500"
  },
  "committer": {
    "name": "Tiago Mück",
    "email": "tiago.muck@arm.com",
    "time": "Tue Jun 02 18:39:14 2020 +0000"
  },
  "message": "cpu-o3: fix IQ missing mem barriers\n\nAfter commit e2a5063e5f18f902833c84894b0ff103e3371493 some\nmemory references now tracked as barriers were not having\ntheir completion properly notified to the MemDepUnit.\n\nThis patch fixes InstructionQueue and changes MemDepUnit\u0027s\ncompleteBarrier to completeInst, which now should be called\nfor both memory references and barrier instructions.\n\nChange-Id: I28b5f112b45778f6272e71bb3766b364c3d2e7db\nSigned-off-by: Tiago Mück \u003ctiago.muck@arm.com\u003e\nReviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29654\nReviewed-by: Daniel Carvalho \u003codanrc@yahoo.com.br\u003e\nMaintainer: Jason Lowe-Power \u003cpower.jg@gmail.com\u003e\nTested-by: kokoro \u003cnoreply+kokoro@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f9e2966f0574d2afd6a88444946e13bb9143bd32",
      "old_mode": 33188,
      "old_path": "src/cpu/o3/inst_queue.hh",
      "new_id": "b8878f3b15bf0274473305a84e3b10e9a49333c7",
      "new_mode": 33188,
      "new_path": "src/cpu/o3/inst_queue.hh"
    },
    {
      "type": "modify",
      "old_id": "67b1108a3db6b9a45500830f344be3f9bae13e9a",
      "old_mode": 33188,
      "old_path": "src/cpu/o3/inst_queue_impl.hh",
      "new_id": "ff5b3be4fe54d5687b39097019177366590c79f5",
      "new_mode": 33188,
      "new_path": "src/cpu/o3/inst_queue_impl.hh"
    },
    {
      "type": "modify",
      "old_id": "3d24b1f130c428976b33bbc134567dd199281733",
      "old_mode": 33188,
      "old_path": "src/cpu/o3/mem_dep_unit.hh",
      "new_id": "685f6496bcbb6c07873b71ea7918fc8b1a6b90e3",
      "new_mode": 33188,
      "new_path": "src/cpu/o3/mem_dep_unit.hh"
    },
    {
      "type": "modify",
      "old_id": "d1eac2996ba8fb1cda9a0a8db35fd9655ffb15ec",
      "old_mode": 33188,
      "old_path": "src/cpu/o3/mem_dep_unit_impl.hh",
      "new_id": "3a7ad363cce1f45452bc05bc53f4938694173933",
      "new_mode": 33188,
      "new_path": "src/cpu/o3/mem_dep_unit_impl.hh"
    }
  ]
}