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import argparse
from importlib.machinery import SourceFileLoader

from cache_hierarchies import ModMIExampleCacheHierarchy

import m5

from m5.debug import flags
from m5.objects import Root
from gem5.components.boards.test_board import TestBoard
from gem5.components.memory.simple import SingleChannelSimpleMemory
from gem5.components.processors.complex_generator import ComplexGenerator

argparser = argparse.ArgumentParser()

argparser.add_argument(
    "config_name",
    type=str,
    help="Name of the python file "
    "including the defintion of a python generator and "
    "importing the right replacement policy. The python "
    "generator should only assume one positional argument "
    "and be named python_generator. The replacement policy"
    " should be imported as rp.",
)
argparser.add_argument(
    "config_path",
    type=str,
    help="Path to the python file" "specified by config_name.",
)

args = argparser.parse_args()

module = SourceFileLoader(args.config_name, args.config_path).load_module()
python_generator = module.python_generator
rp_class = module.rp

flags["RubyHitMiss"].enable()

cache_hierarchy = ModMIExampleCacheHierarchy(rp_class)

memory = SingleChannelSimpleMemory(
    latency="30ns",
    latency_var="0ns",
    bandwidth="12.8GiB/s",
    size="512MiB",
)

generator = ComplexGenerator()
generator.set_traffic_from_python_generator(python_generator)

# We use the Test Board. This is a special board to run traffic generation
# tasks
motherboard = TestBoard(
    clk_freq="1GHz",
    generator=generator,  # We pass the traffic generator as the processor.
    memory=memory,
    cache_hierarchy=cache_hierarchy,
)
root = Root(full_system=False, system=motherboard)

motherboard._pre_instantiate()
m5.instantiate()

generator.start_traffic()
print("Beginning simulation!")
exit_event = m5.simulate()
print(f"Exiting @ tick {m5.curTick()} because {exit_event.getCause()}.")