src/cpu/nop_static_inst.cc

/*
 * Copyright (c) 2003-2005 The Regents of The University of Michigan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 */

#include "cpu/nop_static_inst.hh"

#include "arch/generic/pcstate.hh"
#include "cpu/static_inst.hh"

namespace gem5
{

namespace
{

class NopStaticInst : public StaticInst
{
  public:
    NopStaticInst() : StaticInst("gem5 nop", No_OpClass) {}

    Fault
    execute(ExecContext *xc, trace::InstRecord *traceData) const override
    {
        return NoFault;
    }

    void
    advancePC(PCStateBase &pc) const override
    {
        pc.advance();
    }

    std::string
    generateDisassembly(Addr pc,
            const loader::SymbolTable *symtab) const override
    {
        return mnemonic;
    }
};

}

StaticInstPtr nopStaticInstPtr = new NopStaticInst;

} // namespace gem5