1. 921a72f mem: Delete authors lists from mem files. by Gabe Black · 5 years ago
  2. a2286fe mem: Use new-style stats in the XBar models by Andreas Sandberg · 5 years ago
  3. cdcc55a mem: Minimize the use of MemObject. by Gabe Black · 6 years ago
  4. 4fc7dfb mem: Deleting this init() method was accidentally dropped during rebase. by Gabe Black · 6 years ago
  5. 599d2c9 mem: Clean up the xbars a little. by Gabe Black · 6 years ago
  6. 4effe34 misc: missing override specifier by Andrea Mondelli · 6 years ago
  7. d3d2483 arch, cpu, dev, gpu, mem, sim, python: start using getPort. by Gabe Black · 6 years ago
  8. 6cb46ba mem: Use address range to find the destination port in the xbar by Nikos Nikoleris · 7 years ago
  9. 9494e7d mem: Use the caching built into AddrRangeMap in the xbar by Gabe Black · 7 years ago
  10. 8421362 mem: Replace EventWrapper use with EventFunctionWrapper by Sean Wilson · 8 years ago
  11. bbd3703 mem: Make the BaseXBar public to not confuse Python wrappers by Andreas Sandberg · 8 years ago
  12. 845a10e mem: hmc: minor fixes by Erfan Azarkhish · 9 years ago
  13. 22c0419 misc: Remove redundant compiler-specific defines by Andreas Hansson · 9 years ago
  14. ed38e34 sim: Refactor and simplify the drain API by Andreas Sandberg · 10 years ago
  15. f16c0a4 sim: Decouple draining from the SimObject hierarchy by Andreas Sandberg · 10 years ago
  16. db85ddc mem: Delay responses in the crossbar before forwarding by Andreas Hansson · 10 years ago
  17. d35dd71 mem: Add crossbar latencies by Marco Balboni · 10 years ago
  18. f26a289 mem: Split port retry for all different packet classes by Andreas Hansson · 10 years ago
  19. 268d9e5 mem: Clarification of packet crossbar timings by Marco Balboni · 10 years ago
  20. 072f784 mem: Make the XBar responsible for tracking response routing by Andreas Hansson · 10 years ago
  21. 1f6d5f8 mem: Rename Bus to XBar to better reflect its behaviour by Andreas Hansson · 10 years ago[Renamed (70%) from src/mem/bus.hh]
  22. 1ff4c45 mem: Avoid unecessary retries when bus peer is not ready by Andreas Hansson · 10 years ago
  23. d4273cc mem: Set the cache line size on a system level by Andreas Hansson · 12 years ago
  24. 2308f81 mem: Make the buses multi layered by Andreas Hansson · 12 years ago
  25. e82996d mem: Separate the two snoop response cases in the bus by Andreas Hansson · 12 years ago
  26. 91f7b06 mem: Add basic stats to the buses by Uri Wiener · 12 years ago
  27. e1e73c5 mem: Use unordered set in bus request tracking by Andreas Hansson · 12 years ago
  28. 93a8423 mem: Separate waiting for the bus and waiting for a peer by Andreas Hansson · 12 years ago
  29. 362f6f1 mem: Introduce a variable for the retrying port by Andreas Hansson · 12 years ago
  30. cafd38f mem: Merge ranges in bus before passing them on by Andreas Hansson · 12 years ago
  31. b3fc883 mem: Make packet bus-related time accounting relative by Andreas Hansson · 12 years ago
  32. 7cd49b2 sim: Make clock private and access using clockPeriod() by Andreas Hansson · 12 years ago
  33. 71da1d2 base: Encapsulate the underlying fields in AddrRange by Andreas Hansson · 12 years ago
  34. b81a977 sim: Move the draining interface into a separate base class by Andreas Sandberg · 12 years ago
  35. 2a740aa Port: Add protocol-agnostic ports in the port hierarchy by Andreas Hansson · 12 years ago
  36. 0c58106 Mem: Use deque instead of list for bus retries by Andreas Hansson · 12 years ago
  37. 36d199b Mem: Use range operations in bus in preparation for striping by Andreas Hansson · 12 years ago
  38. 43ca841 Mem: Determine bus block size during initialisation by Andreas Hansson · 12 years ago
  39. 4aee3aa Mem: Tidy up bus member variables types by Andreas Hansson · 12 years ago
  40. ffb6aec AddrRange: Transition from Range<T> to AddrRange by Andreas Hansson · 12 years ago
  41. 4522178 Clock: Move the clock and related functions to ClockedObject by Andreas Hansson · 13 years ago
  42. 8caaac0 Bus: Split the bus into separate request/response layers by Andreas Hansson · 13 years ago
  43. 995e6e4 Bus: Add a notion of layers to the buses by Andreas Hansson · 13 years ago
  44. 14f9c77 Bus: Replace tickNextIdle and inRetry with a state variable by Andreas Hansson · 13 years ago
  45. 46d9adb Port: Make getAddrRanges const by Andreas Hansson · 13 years ago
  46. 0d32940 Bus: Split the bus into a non-coherent and coherent bus by Andreas Hansson · 13 years ago
  47. b8cf48a Bus: Remove redundant packet parameter from isOccupied by Andreas Hansson · 13 years ago
  48. 5880fbe Bus: Turn the PortId into a transport function parameter by Andreas Hansson · 13 years ago
  49. cad8027 Packet: Unify the use of PortID in packet and port by Andreas Hansson · 13 years ago
  50. 3fea59e MEM: Separate requests and responses for timing accesses by Andreas Hansson · 13 years ago
  51. beed20d MEM: Use base class Master/SlavePort pointers in the bus by Andreas Hansson · 13 years ago
  52. 4c92708 MEM: Add the PortId type and a corresponding id field to Port by Andreas Hansson · 13 years ago
  53. dccca0d MEM: Separate snoops and normal memory requests/responses by Andreas Hansson · 13 years ago
  54. f9d403a MEM: Introduce the master/slave port sub-classes in C++ by William Wang · 13 years ago
  55. 9727b1b MEM: Unify bus access methods and prepare for master/slave split by Andreas Hansson · 13 years ago
  56. 1031b82 MEM: Move port creation to the memory object(s) construction by Andreas Hansson · 13 years ago
  57. ef4af8c MEM: Fatal when no port can be found for an address by Andreas Hansson · 13 years ago
  58. cdb3286 MEM: Remove onRetryList from BusPort and rely on retryList by Andreas Hansson · 13 years ago
  59. acd289b MEM: Make the bus default port yet another port by Andreas Hansson · 13 years ago
  60. e731cf4 MEM: Remove the functional ports from the memory system by William Wang · 13 years ago
  61. 07cf9d9 MEM: Separate queries for snooping and address ranges by Andreas Hansson · 13 years ago
  62. 142380a MEM: Remove Port removeConn and MemObject deletePortRefs by Andreas Hansson · 13 years ago
  63. 39a0556 includes: sort all includes by Nathan Binkert · 14 years ago
  64. 0685ae7 bus: clean up default responder code. by Steve Reinhardt · 15 years ago
  65. 6faf377 types: clean up types, especially signed vs unsigned by Nathan Binkert · 16 years ago
  66. 8d2e51c includes: sort includes again by Nathan Binkert · 16 years ago
  67. 709d859 includes: use base/types.hh not inttypes.h or stdint.h by Nathan Binkert · 16 years ago
  68. caaac16 Backed out changeset 94a7bb476fca: caused memory leak. by Steve Reinhardt · 17 years ago
  69. 6b45238 Generate more useful error messages for unconnected ports. by Steve Reinhardt · 17 years ago
  70. 131c65f Restructure bus timing calcs to cope with pkt being deleted by target. by Steve Reinhardt · 17 years ago
  71. ec1a4cb Bus: Fix the bus timing to be more realistic. by Gabe Black · 17 years ago
  72. 6cc1573 Make the Event::description() a const function by Stephen Hines · 17 years ago
  73. 54cc005 params: Deprecate old-style constructors; update most SimObject constructors. by Miles Kaufmann · 17 years ago
  74. 06a9f58 DMA: Add IOCache and fix bus bridge to optionally only send requests one by Ali Saidi · 18 years ago
  75. 3d40cba Port, StaticInst: Revert unnecessary changes. by Vincentius Robby · 18 years ago
  76. 13d10e8 alpha: Make the TLB cache to actually work. by Vincentius Robby · 18 years ago
  77. 1db9e1f port: Implement cache for port interfaces and ranges by Vincentius Robby · 18 years ago
  78. de52eeb Integrate snoop loop functions into their respective call sites. by Steve Reinhardt · 18 years ago
  79. f790f34 Make Bus::findPort() a little more useful. by Steve Reinhardt · 18 years ago
  80. d69a763 Merge vm1.(none):/home/stever/bk/newmem-head by Steve Reinhardt · 18 years ago
  81. 35cf19d More major reorg of cache. Seems to work for atomic mode now, by Steve Reinhardt · 18 years ago
  82. fc4ab05 Add a startup function that will fast forward to the right clock edge by Nathan Binkert · 18 years ago
  83. 4124179 Change getDeviceAddressRanges to use bool for snoop arg. by Steve Reinhardt · 18 years ago
  84. 0dfc29a fix partial writes with a functional memory hack by Ali Saidi · 18 years ago
  85. d0ea8ff The MemoryObject tha owns a port should delete it if it so chooses when deletePortRefs() is called on it with that port as a parameter. by Ali Saidi · 18 years ago
  86. 027dfa0 stop m5 from leaking like a sieve by Ali Saidi · 18 years ago
  87. 51e54f5 Minor DPRINTF fixes. by Steve Reinhardt · 18 years ago
  88. 4943d58 Use my range_map to speed up findPort() in the bus. The snoop code could still use some work. by Ali Saidi · 18 years ago
  89. 8155e61 Update atomic and functional paths for snoops as well by Ron Dreslinski · 18 years ago
  90. 4135dd4 Update bus bridges now that snoop ranges are passed properly by Ron Dreslinski · 18 years ago
  91. 8ba73da Fix up bus draining and add draining to the caches. by Kevin Lim · 18 years ago
  92. e71ccde Merge ktlim@zizzer:/bk/newmem by Kevin Lim · 18 years ago
  93. 45363ea Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change. by Kevin Lim · 18 years ago
  94. b565660 Merge zizzer.eecs.umich.edu:/bk/newmem/ by Gabe Black · 18 years ago
  95. 8dbab9f Added code to handle draining. by Gabe Black · 18 years ago
  96. b26355d Ports now have a pointer to the MemObject that owns it (can be NULL). by Kevin Lim · 18 years ago
  97. a4c6f0d Use PacketPtr everywhere by Nathan Binkert · 18 years ago
  98. 388d484 Make default ID unique (not broadcast) Fix a segfault associated with DefaultId by Ron Dreslinski · 18 years ago
  99. 14c8e8b Forgot to mark myself as on the retry list by Ron Dreslinski · 18 years ago
  100. 3c7e0ec Fix bus in FS mode. by Ron Dreslinski · 18 years ago