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gem5
/
public
/
gem5
/
7185c9ea1936c0045858add1c8c116b15780debc
/
src
/
cpu
/
nativetrace.cc
336e732
misc: Replace namespace Trace with lowercase trace
by Giacomo Travaglini
· 2 years, 4 months ago
974a47d
misc: Adopt the gem5 namespace
by Daniel R. Carvalho
· 3 years, 8 months ago
2343ee2
cpu: Stop "using namespace std"
by Gabe Black
· 4 years ago
91d83cc
misc: Standardize the way create() constructs SimObjects.
by Gabe Black
· 4 years, 3 months ago
6687265
cpu: Delete authors lists from the cpu directory.
by Gabe Black
· 5 years ago
7a8dda4
style: [patch 1/22] use /r/3648/ to reorganize includes
by Brandon Potter
· 8 years ago
5592798
style: fix missing spaces in control statements
by Steve Reinhardt
· 9 years ago
eddac53
trace: reimplement the DTRACE function so it doesn't use a vector
by Nathan Binkert
· 14 years ago
c69d48f
Make commenting on close namespace brackets consistent.
by Steve Reinhardt
· 14 years ago
8ec235c
ARM: Make native trace print out what instruction caused an error.
by Gabe Black
· 15 years ago
3e8e813
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
by Gabe Black
· 15 years ago
b398b8f
Registers: Add a registers.hh file as an ISA switched header.
by Gabe Black
· 16 years ago
50ef39a
sockets: Add a function to disable all listening sockets.
by Nathan Binkert
· 16 years ago
26044dc
X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and actually compare xmm.
by Gabe Black
· 17 years ago
9416756
X86: Get x86 to compile again after the simobject constructor change.
by Gabe Black
· 17 years ago
e42524a
X86: Reorganize the native tracing code.
by Gabe Black
· 17 years ago
b6395da
X86: Fix register ordering.
by Gabe Black
· 17 years ago
8dd7700
Turn the instruction tracing code into pluggable sim objects.
by Gabe Black
· 17 years ago