commit 00dec3065ab816e9e47234a3623010547cb7e487
author Gabe Black <gabeblack@google.com> Thu Oct 11 18:00:03 2018 -0700
committer Gabe Black <gabeblack@google.com> Wed Oct 17 20:16:29 2018 +0000
tree 29e16ce9a688086434903f09d68a57a59e9f3624
parent 7d719bc81191f74149fabf536a0cfc573c172a26

dev: Build most of the networking devices in the NULL_ISA build.

The only part of these devices which are incompatible with other ISAs,
with the possible exception of endianness transformation, is that
the dist_iface implementation refers to ThreadContext methods and
that class is heavily tied to the guest ISA. Only those few lines are
excluded in a NULL_ISA build.

Change-Id: Ic6d643fdbb792d0a996a37d75e027c5ce0ecd460
Reviewed-on: https://gem5-review.googlesource.com/c/13469
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/dev/net/SConscript

diff --git a/src/dev/net/SConscript b/src/dev/net/SConscript
index e39df9d..908dd44 100644
--- a/src/dev/net/SConscript
+++ b/src/dev/net/SConscript
@@ -44,9 +44,6 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
-    Return()
-
 SimObject('Ethernet.py')
 
 # Basic Ethernet infrastructure

src/dev/net/dist_iface.cc

diff --git a/src/dev/net/dist_iface.cc b/src/dev/net/dist_iface.cc
index 7eef5d8..ded8901 100644
--- a/src/dev/net/dist_iface.cc
+++ b/src/dev/net/dist_iface.cc
@@ -869,11 +869,13 @@
         // stop point.  Suspend execution of all local thread contexts.
         // Dist-gem5 will reactivate all thread contexts when everyone has
         // reached the sync stop point.
+#if THE_ISA != NULL_ISA
         for (int i = 0; i < master->sys->numContexts(); i++) {
             ThreadContext *tc = master->sys->getThreadContext(i);
             if (tc->status() == ThreadContext::Active)
                 tc->quiesce();
         }
+#endif
     } else {
         inform("Request toggling syncronization on\n");
         master->syncEvent->start();
@@ -882,11 +884,13 @@
         // nodes to prevent causality errors.  We can also schedule CPU
         // activation here, since we know exactly when the next sync will
         // occur.
+#if THE_ISA != NULL_ISA
         for (int i = 0; i < master->sys->numContexts(); i++) {
             ThreadContext *tc = master->sys->getThreadContext(i);
             if (tc->status() == ThreadContext::Active)
                 tc->quiesceTick(master->syncEvent->when() + 1);
         }
+#endif
     }
 }