sim-se: Refactor clone to avoid most ifdefs
Some parts of clone are architecture dependent. In some cases, we are
able to use architecture-specific helper functions or register
aliases. However, there is still some architecture-specific that is
protected by ifdefs in the common clone implementation.
Move these architecture-specific bits to the architecture-specific OS
class instead to avoid these ifdefs and make the code a bit more
readable.
Change-Id: Ia0903d738d0ba890863bddfa77e3b717db7f45de
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Cc: Giacomo Travaglini <giacomo.travaglini@arm.com>
Cc: Javier Setoain <javier.setoain@arm.com>
Cc: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15435
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
diff --git a/src/arch/alpha/linux/linux.hh b/src/arch/alpha/linux/linux.hh
index cacb96b..3fd6567 100644
--- a/src/arch/alpha/linux/linux.hh
+++ b/src/arch/alpha/linux/linux.hh
@@ -31,6 +31,7 @@
#ifndef __ALPHA_ALPHA_LINUX_LINUX_HH__
#define __ALPHA_ALPHA_LINUX_LINUX_HH__
+#include "arch/alpha/utility.hh"
#include "kern/linux/linux.hh"
/* AlphaLinux class contains static constants/definitions/misc.
@@ -196,6 +197,17 @@
// For futex system call
static const unsigned TGT_EAGAIN = 35;
static const unsigned TGT_EWOULDBLOCK = TGT_EAGAIN;
+
+ static void
+ archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+ {
+ AlphaISA::copyMiscRegs(ptc, ctc);
+ if (stack)
+ ctc->setIntReg(AlphaISA::StackPointerReg, stack);
+ }
};
#endif // __ALPHA_ALPHA_LINUX_LINUX_HH__
diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index 73f0fa6..9e9ca1f 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -45,9 +45,26 @@
#ifndef __ARCH_ARM_LINUX_LINUX_HH__
#define __ARCH_ARM_LINUX_LINUX_HH__
+#include "arch/arm/utility.hh"
#include "kern/linux/linux.hh"
-class ArmLinux32 : public Linux
+class ArmLinux : public Linux
+{
+ public:
+ static void
+ archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+ {
+ ArmISA::copyRegs(ptc, ctc);
+
+ if (stack)
+ ctc->setIntReg(TheISA::StackPointerReg, stack);
+ }
+};
+
+class ArmLinux32 : public ArmLinux
{
public:
@@ -256,7 +273,7 @@
};
};
-class ArmLinux64 : public Linux
+class ArmLinux64 : public ArmLinux
{
public:
diff --git a/src/arch/riscv/linux/linux.hh b/src/arch/riscv/linux/linux.hh
index cfc1d4f..2dac1fe 100644
--- a/src/arch/riscv/linux/linux.hh
+++ b/src/arch/riscv/linux/linux.hh
@@ -31,6 +31,7 @@
#ifndef __ARCH_RISCV_LINUX_LINUX_HH__
#define __ARCH_RISCV_LINUX_LINUX_HH__
+#include "arch/riscv/utility.hh"
#include "kern/linux/linux.hh"
class RiscvLinux : public Linux
@@ -187,6 +188,17 @@
uint64_t freehigh;
uint32_t mem_unit;
} tgt_sysinfo;
+
+ static void
+ archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+ {
+ RiscvISA::copyRegs(ptc, ctc);
+ if (stack)
+ ctc->setIntReg(RiscvISA::StackPointerReg, stack);
+ }
};
#endif
diff --git a/src/arch/sparc/linux/linux.hh b/src/arch/sparc/linux/linux.hh
index 69d373b..1de949d 100644
--- a/src/arch/sparc/linux/linux.hh
+++ b/src/arch/sparc/linux/linux.hh
@@ -31,6 +31,7 @@
#ifndef __ARCH_SPARC_LINUX_LINUX_HH__
#define __ARCH_SPARC_LINUX_LINUX_HH__
+#include "arch/sparc/utility.hh"
#include "kern/linux/linux.hh"
class SparcLinux : public Linux
@@ -182,6 +183,28 @@
return false;
}
}
+
+ static void
+ archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+ {
+ SparcISA::copyRegs(ptc, ctc);
+ ctc->setIntReg(SparcISA::NumIntArchRegs + 6, 0);
+ ctc->setIntReg(SparcISA::NumIntArchRegs + 4, 0);
+ ctc->setIntReg(SparcISA::NumIntArchRegs + 3, SparcISA::NWindows - 2);
+ ctc->setIntReg(SparcISA::NumIntArchRegs + 5, SparcISA::NWindows);
+ ctc->setMiscReg(SparcISA::MISCREG_CWP, 0);
+ ctc->setIntReg(SparcISA::NumIntArchRegs + 7, 0);
+ ctc->setMiscRegNoEffect(SparcISA::MISCREG_TL, 0);
+ ctc->setMiscReg(SparcISA::MISCREG_ASI, SparcISA::ASI_PRIMARY);
+ for (int y = 8; y < 32; y++)
+ ctc->setIntReg(y, ptc->readIntReg(y));
+
+ if (stack)
+ ctc->setIntReg(SparcISA::StackPointerReg, stack);
+ }
};
class Sparc32Linux : public SparcLinux
diff --git a/src/arch/x86/linux/linux.hh b/src/arch/x86/linux/linux.hh
index ef0715f..9149804 100644
--- a/src/arch/x86/linux/linux.hh
+++ b/src/arch/x86/linux/linux.hh
@@ -40,9 +40,31 @@
#ifndef __ARCH_X86_LINUX_LINUX_HH__
#define __ARCH_X86_LINUX_LINUX_HH__
+#include "arch/x86/utility.hh"
#include "kern/linux/linux.hh"
-class X86Linux64 : public Linux
+class X86Linux : public Linux
+{
+ public:
+ static void
+ archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+ {
+ X86ISA::copyRegs(ptc, ctc);
+
+ if (flags & TGT_CLONE_SETTLS) {
+ ctc->setMiscRegNoEffect(X86ISA::MISCREG_FS_BASE, tls);
+ ctc->setMiscRegNoEffect(X86ISA::MISCREG_FS_EFF_BASE, tls);
+ }
+
+ if (stack)
+ ctc->setIntReg(X86ISA::StackPointerReg, stack);
+ }
+};
+
+class X86Linux64 : public X86Linux
{
public:
@@ -185,7 +207,7 @@
};
-class X86Linux32 : public Linux
+class X86Linux32 : public X86Linux
{
public:
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 8480c7e..343fb27 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -1279,11 +1279,11 @@
* The flag defines the list of clone() arguments in the following
* order: flags -> newStack -> ptidPtr -> tlsPtr -> ctidPtr
*/
- Addr tlsPtr M5_VAR_USED = p->getSyscallArg(tc, index);
+ Addr tlsPtr = p->getSyscallArg(tc, index);
Addr ctidPtr = p->getSyscallArg(tc, index);
#else
Addr ctidPtr = p->getSyscallArg(tc, index);
- Addr tlsPtr M5_VAR_USED = p->getSyscallArg(tc, index);
+ Addr tlsPtr = p->getSyscallArg(tc, index);
#endif
if (((flags & OS::TGT_CLONE_SIGHAND)&& !(flags & OS::TGT_CLONE_VM)) ||
@@ -1365,33 +1365,7 @@
ctc->clearArchRegs();
-#if THE_ISA == ALPHA_ISA
- TheISA::copyMiscRegs(tc, ctc);
-#elif THE_ISA == SPARC_ISA
- TheISA::copyRegs(tc, ctc);
- ctc->setIntReg(TheISA::NumIntArchRegs + 6, 0);
- ctc->setIntReg(TheISA::NumIntArchRegs + 4, 0);
- ctc->setIntReg(TheISA::NumIntArchRegs + 3, TheISA::NWindows - 2);
- ctc->setIntReg(TheISA::NumIntArchRegs + 5, TheISA::NWindows);
- ctc->setMiscReg(TheISA::MISCREG_CWP, 0);
- ctc->setIntReg(TheISA::NumIntArchRegs + 7, 0);
- ctc->setMiscRegNoEffect(TheISA::MISCREG_TL, 0);
- ctc->setMiscReg(TheISA::MISCREG_ASI, TheISA::ASI_PRIMARY);
- for (int y = 8; y < 32; y++)
- ctc->setIntReg(y, tc->readIntReg(y));
-#elif THE_ISA == ARM_ISA or THE_ISA == X86_ISA or THE_ISA == RISCV_ISA
- TheISA::copyRegs(tc, ctc);
-#endif
-
-#if THE_ISA == X86_ISA
- if (flags & OS::TGT_CLONE_SETTLS) {
- ctc->setMiscRegNoEffect(TheISA::MISCREG_FS_BASE, tlsPtr);
- ctc->setMiscRegNoEffect(TheISA::MISCREG_FS_EFF_BASE, tlsPtr);
- }
-#endif
-
- if (newStack)
- ctc->setIntReg(TheISA::StackPointerReg, newStack);
+ OS::archClone(flags, p, cp, tc, ctc, newStack, tlsPtr);
cp->setSyscallReturn(ctc, 0);
