)]}'
{
  "commit": "204e932607aa582cd7036b08e20521c2c6c49941",
  "tree": "7f79e85a17fb19fbc7109c2e0c74e678f43d6b37",
  "parents": [
    "47fd797f1ecd303da3263b180904a7a0b0e18581"
  ],
  "author": {
    "name": "Giacomo Travaglini",
    "email": "giacomo.travaglini@arm.com",
    "time": "Thu Jan 10 17:28:05 2019 +0000"
  },
  "committer": {
    "name": "Giacomo Travaglini",
    "email": "giacomo.travaglini@arm.com",
    "time": "Fri Jan 25 12:51:29 2019 +0000"
  },
  "message": "cpu: O3 rename using the flatIndex instead of index\n\nThis patch is replacing the RegId::index with RegId::flatIndex so that\nit provides a valid register number when used by a VecElem register.\n\nChange-Id: I5b000abb9457cd325c2a3021e772a75ea33d8a4c\nSigned-off-by: Giacomo Travaglini \u003cgiacomo.travaglini@arm.com\u003e\nReviewed-on: https://gem5-review.googlesource.com/c/15600\nMaintainer: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\nReviewed-by: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d1876a9650f4b41b8af953931771e366fedf8cc1",
      "old_mode": 33188,
      "old_path": "src/cpu/o3/rename_map.cc",
      "new_id": "1b831d940267d5883b4b87c21bdbd4d673e1c5f3",
      "new_mode": 33188,
      "new_path": "src/cpu/o3/rename_map.cc"
    }
  ]
}