| commit | 401165c778108ab22aeeee55c4f4451ca93bcffb | [log] [tgz] |
|---|---|---|
| author | Ali Saidi <Ali.Saidi@ARM.com> | Fri May 13 17:27:01 2011 -0500 |
| committer | Ali Saidi <Ali.Saidi@ARM.com> | Fri May 13 17:27:01 2011 -0500 |
| tree | f525ba64108f6ebe208a04d2dee7b77621cafd96 | |
| parent | e097c4fb188fafc9cd2253500ab2d056da886c9c [diff] |
ARM: Further break up condition code into NZ, C, V bits. Break up the condition code bits into NZ, C, V registers. These are individually written and this removes some incorrect dependencies between instructions.