)]}'
{
  "commit": "72d1d2930fc2b8ef6d32ec2ce2eabbac00684159",
  "tree": "30e4dff525d704bf39e446e1a9ee80ebb7418635",
  "parents": [
    "cf45f22369f85397f113918a4f773b2613f0e19b"
  ],
  "author": {
    "name": "Tuan Ta",
    "email": "qtt2@cornell.edu",
    "time": "Mon Apr 02 16:21:28 2018 -0400"
  },
  "committer": {
    "name": "Tuan Ta",
    "email": "qtt2@cornell.edu",
    "time": "Fri Feb 08 15:25:30 2019 +0000"
  },
  "message": "arch-riscv: initialize RISC-V\u0027s thread pointer register in clone syscall\n\nThis patch initializes thread pointer register to Thread Local Storage\n(TLS)\u0027s pointer given to a clone system call.\n\nChange-Id: I03e2cf4763e6a0ed31f357772a513a05e1e3461b\nReviewed-on: https://gem5-review.googlesource.com/c/9622\nReviewed-by: Brandon Potter \u003cBrandon.Potter@amd.com\u003e\nMaintainer: Brandon Potter \u003cBrandon.Potter@amd.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "23b4fd562e315058c9552b0a30a9533578a0203e",
      "old_mode": 33188,
      "old_path": "src/arch/riscv/linux/linux.hh",
      "new_id": "441550a506656ec06c44480b6a601c388fd9d1b7",
      "new_mode": 33188,
      "new_path": "src/arch/riscv/linux/linux.hh"
    }
  ]
}