commit | 8efcc0faac252d716704b5f8f9f3e1c165910ebe | [log] [tgz] |
---|---|---|
author | Tuan Ta <qtt2@cornell.edu> | Tue Feb 05 10:08:10 2019 -0500 |
committer | Tuan Ta <qtt2@cornell.edu> | Wed Feb 06 16:57:48 2019 +0000 |
tree | 7321e09d0b6399b0147dcb15405d02858eaf30d9 | |
parent | ff5ad434d95403005cbf229a0f4b077b6dbc502b [diff] |
arch-riscv: Initialize interrupt mask This patch initializes RISCV interrupt mask to 0. Change-Id: I56289d9f3f319e239e305befea006a0ad4d86b75 Reviewed-on: https://gem5-review.googlesource.com/c/16162 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>