tree a31ca3cc465712e6b34fa67544657477394b7e33
parent 7bd864c144efd374adc36fe327339a0171ab4a72
author Daniel <odanrc@yahoo.com.br> 1552521095 +0100
committer Daniel Carvalho <odanrc@yahoo.com.br> 1552658771 +0000

mem-cache: Fix write hit latency calculation order

Patch 6d8694a5fb5cfb905186249581cc6a3fde6cc38a changes the order
at which the access latency is calculated for hits. This order
is incorrect, since the calculations must use the blk's whenReady
value before the access is satisfied.

Change-Id: I30dae5435f54200cc8fdf71fd0dbd2cf9c6f8b17
Signed-off-by: Daniel <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17190
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>