commit b0ab5c894d84d4522cae3a254158e47ba112909c
author Gabe Black <gblack@eecs.umich.edu> Tue Jan 06 22:34:18 2009 -0800
committer Gabe Black <gblack@eecs.umich.edu> Tue Jan 06 22:34:18 2009 -0800
tree 6b4992716c89628ae0860e12d0567b61e4280160
parent 2adc60795b0e21d46f983293b3b71b48ee105c14

Tracing: Make tracing aware of macro and micro ops.

src/sim/insttracer.hh

diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh
index 39a5536..9fb5f9f 100644
--- a/src/sim/insttracer.hh
+++ b/src/sim/insttracer.hh
@@ -55,6 +55,8 @@
     // dump the record
     StaticInstPtr staticInst;
     Addr PC;
+    StaticInstPtr macroStaticInst;
+    MicroPC upc;
     bool misspeculating;
 
     // The remaining fields are only valid for particular instruction
@@ -86,10 +88,13 @@
 
   public:
     InstRecord(Tick _when, ThreadContext *_thread,
-               const StaticInstPtr &_staticInst,
-               Addr _pc, bool spec)
+               const StaticInstPtr _staticInst,
+               Addr _pc, bool spec,
+               const StaticInstPtr _macroStaticInst = NULL,
+               MicroPC _upc = 0)
         : when(_when), thread(_thread),
           staticInst(_staticInst), PC(_pc),
+          macroStaticInst(_macroStaticInst), upc(_upc),
           misspeculating(spec)
     {
         data_status = DataInvalid;
@@ -137,7 +142,9 @@
 
     virtual InstRecord *
         getInstRecord(Tick when, ThreadContext *tc,
-                const StaticInstPtr staticInst, Addr pc) = 0;
+                const StaticInstPtr staticInst, Addr pc,
+                const StaticInstPtr macroStaticInst = NULL,
+                MicroPC _upc = 0) = 0;
 };