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// -*- mode:c++ -*-
// Copyright (c) 2010-2011, 2017 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
// not be construed as granting a license to any other intellectual
// property including but not limited to intellectual property relating
// to a hardware implementation of the functionality of the software
// licensed hereunder. You may use the software subject to the license
// terms below provided that you ensure that this notice is replicated
// unmodified and in its entirety in all distributions of the software,
// modified or unmodified, in source code or in binary form.
//
// Copyright (c) 2007-2008 The Florida State University
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer;
// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution;
// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Stephen Hines
//Templates from this format are used later
//Include the basic format
##include "basic.isa"
//Include support for decoding AArch64 instructions
##include "aarch64.isa"
//Include support for decoding AArch64 NEON instructions
##include "neon64.isa"
//Include support for decoding SVE instructions (AArch64-only)
##include "sve_top_level.isa"
##include "sve_2nd_level.isa"
//Include support for predicated instructions
##include "pred.isa"
//Include the float formats
##include "fp.isa"
//Include the mem format
##include "mem.isa"
//Include the macro-mem format
##include "macromem.isa"
//Include the branch format
##include "branch.isa"
//Miscellaneous instructions that don't fit elsewhere
##include "misc.isa"
//Include the breakpoint format
##include "breakpoint.isa"
//Include the formats for data processing instructions
##include "data.isa"
//Include the formats for multiply instructions
##include "mult.isa"
//Unconditional instructions
##include "uncond.isa"
//M5 Psuedo-ops
##include "m5ops.isa"
//Crypto Ops
##include "crypto64.isa"
//gem5-internal pseudo instructions
##include "pseudo.isa"